Lines Matching full:src2
26 def rr : SI<opc, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2),
28 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
29 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
30 [(set RC:$dst, (OpNode RC:$src1, RC:$src2))], d>,
33 def rm : SI<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
35 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
36 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
37 [(set RC:$dst, (OpNode RC:$src1, (load addr:$src2)))], d>,
49 def rr_Int : SI_Int<opc, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2),
51 !strconcat(asm, "\t{$src2, $dst|$dst, $src2}"),
52 !strconcat(asm, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
53 [(set RC:$dst, (VT (OpNode RC:$src1, RC:$src2)))], d>,
56 def rm_Int : SI_Int<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, memopr:$src2),
58 !strconcat(asm, "\t{$src2, $dst|$dst, $src2}"),
59 !strconcat(asm, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
60 [(set RC:$dst, (VT (OpNode RC:$src1, (mem_frags addr:$src2))))], d>,
72 def rr : PI<opc, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2),
74 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
75 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
76 [(set RC:$dst, (vt (OpNode RC:$src1, RC:$src2)))], d>,
79 def rm : PI<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
81 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
82 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
83 [(set RC:$dst, (OpNode RC:$src1, (mem_frag addr:$src2)))],
95 def rr : PI<opc, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2),
97 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
98 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
102 def rm : PI<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
104 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
105 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
198 (ins VR128:$src1, VR128:$src2),
200 [(set VR128:$dst, (vt (OpNode VR128:$src1, VR128:$src2)))], d>,
206 (ins VR128:$src1, VR128:$src2),
217 "\t{$src2, $src1, $dst|$dst, $src1, $src2}", d>,
228 "\t{$src2, $dst|$dst, $src2}", d>;
236 def : InstAlias<"v"#OpcodeStr#".s\t{$src2, $src1, $dst|$dst, $src1, $src2}",
238 VR128:$dst, VR128:$src1, VR128:$src2), 0>;
239 def : InstAlias<OpcodeStr#".s\t{$src2, $dst|$dst, $src2}",
241 VR128:$dst, VR128:$src2), 0>;
667 (outs VR128:$dst), (ins VR128:$src1, f64mem:$src2),
673 (outs VR128:$dst), (ins VR128:$src1, f64mem:$src2),
676 (scalar_to_vector (loadf64 addr:$src2)))))],
685 "\t{$src2, $src1, $dst|$dst, $src1, $src2}">,
690 "\t{$src2, $dst|$dst, $src2}">;
722 def : Pat<(X86Shufp (v4f32 (simple_load addr:$src2)), VR128:$src1,
724 (MOVLPSrm VR128:$src1, addr:$src2)>;
725 def : Pat<(X86Shufp (v4f32 (X86vzload64 addr:$src2)), VR128:$src1, (i8 -28)),
726 (MOVLPSrm VR128:$src1, addr:$src2)>;
767 def : Pat<(v2f64 (X86Unpckl VR128:$src1, (X86vzload64 addr:$src2))),
768 (VMOVHPDrm VR128:$src1, addr:$src2)>;
776 def : Pat<(v2f64 (X86Movsd VR128:$src1, (X86vzload64 addr:$src2))),
777 (VMOVLPDrm VR128:$src1, addr:$src2)>;
784 def : Pat<(X86Movlhps VR128:$src1, (v4f32 (simple_load addr:$src2))),
785 (MOVHPSrm VR128:$src1, addr:$src2)>;
786 def : Pat<(X86Movlhps VR128:$src1, (v4f32 (X86vzload64 addr:$src2))),
787 (MOVHPSrm VR128:$src1, addr:$src2)>;
796 def : Pat<(v2f64 (X86Unpckl VR128:$src1, (X86vzload64 addr:$src2))),
797 (MOVHPDrm VR128:$src1, addr:$src2)>;
805 def : Pat<(v2f64 (X86Movsd VR128:$src1, (X86vzload64 addr:$src2))),
806 (MOVLPDrm VR128:$src1, addr:$src2)>;
812 def : Pat<(X86Movsd VR128:$src1, (v2f64 (simple_load addr:$src2))),
813 (MOVLPDrm VR128:$src1, addr:$src2)>;
822 (ins VR128:$src1, VR128:$src2),
823 "movlhps\t{$src2, $src1, $dst|$dst, $src1, $src2}",
825 (v4f32 (X86Movlhps VR128:$src1, VR128:$src2)))]>,
829 (ins VR128:$src1, VR128:$src2),
830 "movhlps\t{$src2, $src1, $dst|$dst, $src1, $src2}",
832 (v4f32 (X86Movhlps VR128:$src1, VR128:$src2)))]>,
837 (ins VR128:$src1, VR128:$src2),
838 "movlhps\t{$src2, $dst|$dst, $src2}",
840 (v4f32 (X86Movlhps VR128:$src1, VR128:$src2)))]>,
844 (ins VR128:$src1, VR128:$src2),
845 "movhlps\t{$src2, $dst|$dst, $src2}",
847 (v4f32 (X86Movhlps VR128:$src1, VR128:$src2)))]>,
1058 def rr_Int : SI<opc, MRMSrcReg, (outs DstRC:$dst), (ins DstRC:$src1, SrcRC:$src2),
1060 !strconcat(asm, "\t{$src2, $dst|$dst, $src2}"),
1061 !strconcat(asm, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
1065 (ins DstRC:$src1, x86memop:$src2),
1067 asm#"{"#mem#"}\t{$src2, $dst|$dst, $src2}",
1068 asm#"{"#mem#"}\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
1119 def : InstAlias<"vcvtsi2ss{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
1120 (VCVTSI2SSrr_Int VR128:$dst, VR128:$src1, GR32:$src2), 0, "att">;
1121 def : InstAlias<"vcvtsi2ss{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
1122 (VCVTSI642SSrr_Int VR128:$dst, VR128:$src1, GR64:$src2), 0, "att">;
1123 def : InstAlias<"vcvtsi2sd{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
1124 (VCVTSI2SDrr_Int VR128:$dst, VR128:$src1, GR32:$src2), 0, "att">;
1125 def : InstAlias<"vcvtsi2sd{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
1126 (VCVTSI642SDrr_Int VR128:$dst, VR128:$src1, GR64:$src2), 0, "att">;
1290 (ins FR32:$src1, FR64:$src2),
1291 "cvtsd2ss\t{$src2, $src1, $dst|$dst, $src1, $src2}", []>,
1296 (ins FR32:$src1, f64mem:$src2),
1297 "vcvtsd2ss\t{$src2, $src1, $dst|$dst, $src1, $src2}", []>,
1320 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
1321 "vcvtsd2ss\t{$src2, $src1, $dst|$dst, $src1, $src2}",
1323 (v4f32 (X86frounds VR128:$src1, (v2f64 VR128:$src2))))]>,
1327 (outs VR128:$dst), (ins VR128:$src1, sdmem:$src2),
1328 "vcvtsd2ss\t{$src2, $src1, $dst|$dst, $src1, $src2}",
1330 (v4f32 (X86frounds VR128:$src1, (sse_load_f64 addr:$src2))))]>,
1335 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
1336 "cvtsd2ss\t{$src2, $dst|$dst, $src2}",
1338 (v4f32 (X86frounds VR128:$src1, (v2f64 VR128:$src2))))]>,
1341 (outs VR128:$dst), (ins VR128:$src1, sdmem:$src2),
1342 "cvtsd2ss\t{$src2, $dst|$dst, $src2}",
1344 (v4f32 (X86frounds VR128:$src1, (sse_load_f64 addr:$src2))))]>,
1354 (ins FR64:$src1, FR32:$src2),
1355 "vcvtss2sd\t{$src2, $src1, $dst|$dst, $src1, $src2}", []>,
1360 (ins FR64:$src1, f32mem:$src2),
1361 "vcvtss2sd\t{$src2, $src1, $dst|$dst, $src1, $src2}", []>,
1387 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
1388 "vcvtss2sd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
1393 (outs VR128:$dst), (ins VR128:$src1, ssmem:$src2),
1394 "vcvtss2sd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
1399 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
1400 "cvtss2sd\t{$src2, $dst|$dst, $src2}",
1405 (outs VR128:$dst), (ins VR128:$src1, ssmem:$src2),
1406 "cvtss2sd\t{$src2, $dst|$dst, $src2}",
1847 (ins VR128:$src1, VR128:$src2, u8imm:$cc), asm,
1849 VR128:$src2, timm:$cc))]>,
1853 (ins VR128:$src1, memop:$src2, u8imm:$cc), asm,
1855 (mem_frags addr:$src2), timm:$cc))]>,
1861 (outs RC:$dst), (ins RC:$src1, RC:$src2, u8imm:$cc), asm,
1862 [(set RC:$dst, (OpNode RC:$src1, RC:$src2, timm:$cc))]>,
1865 (outs RC:$dst), (ins RC:$src1, x86memop:$src2, u8imm:$cc), asm,
1867 (ld_frag addr:$src2), timm:$cc))]>,
1874 "cmpss\t{$cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc}",
1879 "cmpsd\t{$cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc}",
1886 "cmpss\t{$cc, $src2, $dst|$dst, $src2, $cc}",
1890 "cmpsd\t{$cc, $src2, $dst|$dst, $src2, $cc}",
1900 def rr: SI<opc, MRMSrcReg, (outs), (ins RC:$src1, RC:$src2),
1901 !strconcat(OpcodeStr, "\t{$src2, $src1|$src1, $src2}"),
1902 [(set EFLAGS, (OpNode (vt RC:$src1), RC:$src2))]>,
1905 def rm: SI<opc, MRMSrcMem, (outs), (ins RC:$src1, x86memop:$src2),
1906 !strconcat(OpcodeStr, "\t{$src2, $src1|$src1, $src2}"),
1908 (ld_frag addr:$src2)))]>,
1920 def rr_Int: SI<opc, MRMSrcReg, (outs), (ins RC:$src1, RC:$src2),
1921 !strconcat(OpcodeStr, "\t{$src2, $src1|$src1, $src2}"),
1922 [(set EFLAGS, (OpNode (vt RC:$src1), RC:$src2))]>,
1925 def rm_Int: SI<opc, MRMSrcMem, (outs), (ins RC:$src1, memop:$src2),
1926 !strconcat(OpcodeStr, "\t{$src2, $src1|$src1, $src2}"),
1928 (mem_frags addr:$src2)))]>,
1983 (outs RC:$dst), (ins RC:$src1, RC:$src2, u8imm:$cc), asm,
1984 [(set RC:$dst, (VT (X86any_cmpp RC:$src1, RC:$src2, timm:$cc)))], d>,
1987 (outs RC:$dst), (ins RC:$src1, x86memop:$src2, u8imm:$cc), asm,
1989 (VT (X86any_cmpp RC:$src1, (ld_frag addr:$src2), timm:$cc)))], d>,
1994 "cmpps\t{$cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc}",
1997 "cmppd\t{$cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc}",
2000 "cmpps\t{$cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc}",
2003 "cmppd\t{$cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc}",
2007 "cmpps\t{$cc, $src2, $dst|$dst, $src2, $cc}",
2010 "cmppd\t{$cc, $src2, $dst|$dst, $src2, $cc}",
2021 def : Pat<(v4f64 (X86any_cmpp (loadv4f64 addr:$src2), VR256:$src1,
2023 (VCMPPDYrmi VR256:$src1, addr:$src2, timm:$cc)>;
2025 def : Pat<(v8f32 (X86any_cmpp (loadv8f32 addr:$src2), VR256:$src1,
2027 (VCMPPSYrmi VR256:$src1, addr:$src2, timm:$cc)>;
2029 def : Pat<(v2f64 (X86any_cmpp (loadv2f64 addr:$src2), VR128:$src1,
2031 (VCMPPDrmi VR128:$src1, addr:$src2, timm:$cc)>;
2033 def : Pat<(v4f32 (X86any_cmpp (loadv4f32 addr:$src2), VR128:$src1,
2035 (VCMPPSrmi VR128:$src1, addr:$src2, timm:$cc)>;
2037 def : Pat<(f64 (X86cmps (loadf64 addr:$src2), FR64:$src1,
2039 (VCMPSDrmi FR64:$src1, addr:$src2, timm:$cc)>;
2041 def : Pat<(f32 (X86cmps (loadf32 addr:$src2), FR32:$src1,
2043 (VCMPSSrmi FR32:$src1, addr:$src2, timm:$cc)>;
2047 def : Pat<(v2f64 (X86any_cmpp (memopv2f64 addr:$src2), VR128:$src1,
2049 (CMPPDrmi VR128:$src1, addr:$src2, timm:$cc)>;
2051 def : Pat<(f64 (X86cmps (loadf64 addr:$src2), FR64:$src1,
2053 (CMPSDrmi FR64:$src1, addr:$src2, timm:$cc)>;
2057 def : Pat<(v4f32 (X86any_cmpp (memopv4f32 addr:$src2), VR128:$src1,
2059 (CMPPSrmi VR128:$src1, addr:$src2, timm:$cc)>;
2061 def : Pat<(f32 (X86cmps (loadf32 addr:$src2), FR32:$src1,
2063 (CMPSSrmi FR32:$src1, addr:$src2, timm:$cc)>;
2076 (ins RC:$src1, x86memop:$src2, u8imm:$src3), asm,
2077 [(set RC:$dst, (vt (X86Shufp RC:$src1, (mem_frag addr:$src2),
2082 (ins RC:$src1, RC:$src2, u8imm:$src3), asm,
2083 [(set RC:$dst, (vt (X86Shufp RC:$src1, RC:$src2,
2090 "shufps\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
2094 "shufps\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
2098 "shufpd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
2102 "shufpd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
2108 "shufps\t{$src3, $src2, $dst|$dst, $src2, $src3}",
2111 "shufpd\t{$src3, $src2, $dst|$dst, $src2, $src3}",
2127 (outs RC:$dst), (ins RC:$src1, RC:$src2),
2129 (vt (OpNode RC:$src1, RC:$src2)))], d>,
2132 (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
2135 (mem_frag addr:$src2))))], d>,
2141 VR128, f128mem, "unpckhps\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2144 VR128, f128mem, "unpckhpd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2147 VR128, f128mem, "unpcklps\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2150 VR128, f128mem, "unpcklpd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2154 VR256, f256mem, "unpckhps\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2157 VR256, f256mem, "unpckhpd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2160 VR256, f256mem, "unpcklps\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2163 VR256, f256mem, "unpcklpd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2169 VR128, f128mem, "unpckhps\t{$src2, $dst|$dst, $src2}",
2172 VR128, f128mem, "unpckhpd\t{$src2, $dst|$dst, $src2}",
2175 VR128, f128mem, "unpcklps\t{$src2, $dst|$dst, $src2}",
2178 VR128, f128mem, "unpcklpd\t{$src2, $dst|$dst, $src2}",
2183 def : Pat<(v8i32 (X86Unpckl VR256:$src1, (loadv8i32 addr:$src2))),
2184 (VUNPCKLPSYrm VR256:$src1, addr:$src2)>;
2185 def : Pat<(v8i32 (X86Unpckl VR256:$src1, VR256:$src2)),
2186 (VUNPCKLPSYrr VR256:$src1, VR256:$src2)>;
2187 def : Pat<(v8i32 (X86Unpckh VR256:$src1, (loadv8i32 addr:$src2))),
2188 (VUNPCKHPSYrm VR256:$src1, addr:$src2)>;
2189 def : Pat<(v8i32 (X86Unpckh VR256:$src1, VR256:$src2)),
2190 (VUNPCKHPSYrr VR256:$src1, VR256:$src2)>;
2192 def : Pat<(v4i64 (X86Unpckl VR256:$src1, (loadv4i64 addr:$src2))),
2193 (VUNPCKLPDYrm VR256:$src1, addr:$src2)>;
2194 def : Pat<(v4i64 (X86Unpckl VR256:$src1, VR256:$src2)),
2195 (VUNPCKLPDYrr VR256:$src1, VR256:$src2)>;
2196 def : Pat<(v4i64 (X86Unpckh VR256:$src1, (loadv4i64 addr:$src2))),
2197 (VUNPCKHPDYrm VR256:$src1, addr:$src2)>;
2198 def : Pat<(v4i64 (X86Unpckh VR256:$src1, VR256:$src2)),
2199 (VUNPCKHPDYrr VR256:$src1, VR256:$src2)>;
2205 (v2f64 (simple_load addr:$src2)))),
2206 (MOVHPDrm VR128:$src1, addr:$src2)>;
2269 (ins RC:$src1, RC:$src2),
2271 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
2272 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
2273 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2)))]>,
2276 (ins RC:$src1, x86memop:$src2),
2278 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
2279 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
2280 [(set RC:$dst, (OpVT (OpNode RC:$src1, (memop_frag addr:$src2))))]>,
2361 def : Pat<(v32i8 (and VR256:$src1, VR256:$src2)),
2362 (VPANDYrr VR256:$src1, VR256:$src2)>;
2363 def : Pat<(v16i16 (and VR256:$src1, VR256:$src2)),
2364 (VPANDYrr VR256:$src1, VR256:$src2)>;
2365 def : Pat<(v8i32 (and VR256:$src1, VR256:$src2)),
2366 (VPANDYrr VR256:$src1, VR256:$src2)>;
2368 def : Pat<(v32i8 (or VR256:$src1, VR256:$src2)),
2369 (VPORYrr VR256:$src1, VR256:$src2)>;
2370 def : Pat<(v16i16 (or VR256:$src1, VR256:$src2)),
2371 (VPORYrr VR256:$src1, VR256:$src2)>;
2372 def : Pat<(v8i32 (or VR256:$src1, VR256:$src2)),
2373 (VPORYrr VR256:$src1, VR256:$src2)>;
2375 def : Pat<(v32i8 (xor VR256:$src1, VR256:$src2)),
2376 (VPXORYrr VR256:$src1, VR256:$src2)>;
2377 def : Pat<(v16i16 (xor VR256:$src1, VR256:$src2)),
2378 (VPXORYrr VR256:$src1, VR256:$src2)>;
2379 def : Pat<(v8i32 (xor VR256:$src1, VR256:$src2)),
2380 (VPXORYrr VR256:$src1, VR256:$src2)>;
2382 def : Pat<(v32i8 (X86andnp VR256:$src1, VR256:$src2)),
2383 (VPANDNYrr VR256:$src1, VR256:$src2)>;
2384 def : Pat<(v16i16 (X86andnp VR256:$src1, VR256:$src2)),
2385 (VPANDNYrr VR256:$src1, VR256:$src2)>;
2386 def : Pat<(v8i32 (X86andnp VR256:$src1, VR256:$src2)),
2387 (VPANDNYrr VR256:$src1, VR256:$src2)>;
2389 def : Pat<(and VR256:$src1, (loadv32i8 addr:$src2)),
2390 (VPANDYrm VR256:$src1, addr:$src2)>;
2391 def : Pat<(and VR256:$src1, (loadv16i16 addr:$src2)),
2392 (VPANDYrm VR256:$src1, addr:$src2)>;
2393 def : Pat<(and VR256:$src1, (loadv8i32 addr:$src2)),
2394 (VPANDYrm VR256:$src1, addr:$src2)>;
2396 def : Pat<(or VR256:$src1, (loadv32i8 addr:$src2)),
2397 (VPORYrm VR256:$src1, addr:$src2)>;
2398 def : Pat<(or VR256:$src1, (loadv16i16 addr:$src2)),
2399 (VPORYrm VR256:$src1, addr:$src2)>;
2400 def : Pat<(or VR256:$src1, (loadv8i32 addr:$src2)),
2401 (VPORYrm VR256:$src1, addr:$src2)>;
2403 def : Pat<(xor VR256:$src1, (loadv32i8 addr:$src2)),
2404 (VPXORYrm VR256:$src1, addr:$src2)>;
2405 def : Pat<(xor VR256:$src1, (loadv16i16 addr:$src2)),
2406 (VPXORYrm VR256:$src1, addr:$src2)>;
2407 def : Pat<(xor VR256:$src1, (loadv8i32 addr:$src2)),
2408 (VPXORYrm VR256:$src1, addr:$src2)>;
2410 def : Pat<(X86andnp VR256:$src1, (loadv32i8 addr:$src2)),
2411 (VPANDNYrm VR256:$src1, addr:$src2)>;
2412 def : Pat<(X86andnp VR256:$src1, (loadv16i16 addr:$src2)),
2413 (VPANDNYrm VR256:$src1, addr:$src2)>;
2414 def : Pat<(X86andnp VR256:$src1, (loadv8i32 addr:$src2)),
2415 (VPANDNYrm VR256:$src1, addr:$src2)>;
2421 def : Pat<(v32i8 (and VR256:$src1, VR256:$src2)),
2422 (VANDPSYrr VR256:$src1, VR256:$src2)>;
2423 def : Pat<(v16i16 (and VR256:$src1, VR256:$src2)),
2424 (VANDPSYrr VR256:$src1, VR256:$src2)>;
2425 def : Pat<(v8i32 (and VR256:$src1, VR256:$src2)),
2426 (VANDPSYrr VR256:$src1, VR256:$src2)>;
2427 def : Pat<(v4i64 (and VR256:$src1, VR256:$src2)),
2428 (VANDPSYrr VR256:$src1, VR256:$src2)>;
2430 def : Pat<(v32i8 (or VR256:$src1, VR256:$src2)),
2431 (VORPSYrr VR256:$src1, VR256:$src2)>;
2432 def : Pat<(v16i16 (or VR256:$src1, VR256:$src2)),
2433 (VORPSYrr VR256:$src1, VR256:$src2)>;
2434 def : Pat<(v8i32 (or VR256:$src1, VR256:$src2)),
2435 (VORPSYrr VR256:$src1, VR256:$src2)>;
2436 def : Pat<(v4i64 (or VR256:$src1, VR256:$src2)),
2437 (VORPSYrr VR256:$src1, VR256:$src2)>;
2439 def : Pat<(v32i8 (xor VR256:$src1, VR256:$src2)),
2440 (VXORPSYrr VR256:$src1, VR256:$src2)>;
2441 def : Pat<(v16i16 (xor VR256:$src1, VR256:$src2)),
2442 (VXORPSYrr VR256:$src1, VR256:$src2)>;
2443 def : Pat<(v8i32 (xor VR256:$src1, VR256:$src2)),
2444 (VXORPSYrr VR256:$src1, VR256:$src2)>;
2445 def : Pat<(v4i64 (xor VR256:$src1, VR256:$src2)),
2446 (VXORPSYrr VR256:$src1, VR256:$src2)>;
2448 def : Pat<(v32i8 (X86andnp VR256:$src1, VR256:$src2)),
2449 (VANDNPSYrr VR256:$src1, VR256:$src2)>;
2450 def : Pat<(v16i16 (X86andnp VR256:$src1, VR256:$src2)),
2451 (VANDNPSYrr VR256:$src1, VR256:$src2)>;
2452 def : Pat<(v8i32 (X86andnp VR256:$src1, VR256:$src2)),
2453 (VANDNPSYrr VR256:$src1, VR256:$src2)>;
2454 def : Pat<(v4i64 (X86andnp VR256:$src1, VR256:$src2)),
2455 (VANDNPSYrr VR256:$src1, VR256:$src2)>;
2457 def : Pat<(and VR256:$src1, (loadv32i8 addr:$src2)),
2458 (VANDPSYrm VR256:$src1, addr:$src2)>;
2459 def : Pat<(and VR256:$src1, (loadv16i16 addr:$src2)),
2460 (VANDPSYrm VR256:$src1, addr:$src2)>;
2461 def : Pat<(and VR256:$src1, (loadv8i32 addr:$src2)),
2462 (VANDPSYrm VR256:$src1, addr:$src2)>;
2463 def : Pat<(and VR256:$src1, (loadv4i64 addr:$src2)),
2464 (VANDPSYrm VR256:$src1, addr:$src2)>;
2466 def : Pat<(or VR256:$src1, (loadv32i8 addr:$src2)),
2467 (VORPSYrm VR256:$src1, addr:$src2)>;
2468 def : Pat<(or VR256:$src1, (loadv16i16 addr:$src2)),
2469 (VORPSYrm VR256:$src1, addr:$src2)>;
2470 def : Pat<(or VR256:$src1, (loadv8i32 addr:$src2)),
2471 (VORPSYrm VR256:$src1, addr:$src2)>;
2472 def : Pat<(or VR256:$src1, (loadv4i64 addr:$src2)),
2473 (VORPSYrm VR256:$src1, addr:$src2)>;
2475 def : Pat<(xor VR256:$src1, (loadv32i8 addr:$src2)),
2476 (VXORPSYrm VR256:$src1, addr:$src2)>;
2477 def : Pat<(xor VR256:$src1, (loadv16i16 addr:$src2)),
2478 (VXORPSYrm VR256:$src1, addr:$src2)>;
2479 def : Pat<(xor VR256:$src1, (loadv8i32 addr:$src2)),
2480 (VXORPSYrm VR256:$src1, addr:$src2)>;
2481 def : Pat<(xor VR256:$src1, (loadv4i64 addr:$src2)),
2482 (VXORPSYrm VR256:$src1, addr:$src2)>;
2484 def : Pat<(X86andnp VR256:$src1, (loadv32i8 addr:$src2)),
2485 (VANDNPSYrm VR256:$src1, addr:$src2)>;
2486 def : Pat<(X86andnp VR256:$src1, (loadv16i16 addr:$src2)),
2487 (VANDNPSYrm VR256:$src1, addr:$src2)>;
2488 def : Pat<(X86andnp VR256:$src1, (loadv8i32 addr:$src2)),
2489 (VANDNPSYrm VR256:$src1, addr:$src2)>;
2490 def : Pat<(X86andnp VR256:$src1, (loadv4i64 addr:$src2)),
2491 (VANDNPSYrm VR256:$src1, addr:$src2)>;
2495 def : Pat<(v16i8 (and VR128:$src1, VR128:$src2)),
2496 (VPANDrr VR128:$src1, VR128:$src2)>;
2497 def : Pat<(v8i16 (and VR128:$src1, VR128:$src2)),
2498 (VPANDrr VR128:$src1, VR128:$src2)>;
2499 def : Pat<(v4i32 (and VR128:$src1, VR128:$src2)),
2500 (VPANDrr VR128:$src1, VR128:$src2)>;
2502 def : Pat<(v16i8 (or VR128:$src1, VR128:$src2)),
2503 (VPORrr VR128:$src1, VR128:$src2)>;
2504 def : Pat<(v8i16 (or VR128:$src1, VR128:$src2)),
2505 (VPORrr VR128:$src1, VR128:$src2)>;
2506 def : Pat<(v4i32 (or VR128:$src1, VR128:$src2)),
2507 (VPORrr VR128:$src1, VR128:$src2)>;
2509 def : Pat<(v16i8 (xor VR128:$src1, VR128:$src2)),
2510 (VPXORrr VR128:$src1, VR128:$src2)>;
2511 def : Pat<(v8i16 (xor VR128:$src1, VR128:$src2)),
2512 (VPXORrr VR128:$src1, VR128:$src2)>;
2513 def : Pat<(v4i32 (xor VR128:$src1, VR128:$src2)),
2514 (VPXORrr VR128:$src1, VR128:$src2)>;
2516 def : Pat<(v16i8 (X86andnp VR128:$src1, VR128:$src2)),
2517 (VPANDNrr VR128:$src1, VR128:$src2)>;
2518 def : Pat<(v8i16 (X86andnp VR128:$src1, VR128:$src2)),
2519 (VPANDNrr VR128:$src1, VR128:$src2)>;
2520 def : Pat<(v4i32 (X86andnp VR128:$src1, VR128:$src2)),
2521 (VPANDNrr VR128:$src1, VR128:$src2)>;
2523 def : Pat<(and VR128:$src1, (loadv16i8 addr:$src2)),
2524 (VPANDrm VR128:$src1, addr:$src2)>;
2525 def : Pat<(and VR128:$src1, (loadv8i16 addr:$src2)),
2526 (VPANDrm VR128:$src1, addr:$src2)>;
2527 def : Pat<(and VR128:$src1, (loadv4i32 addr:$src2)),
2528 (VPANDrm VR128:$src1, addr:$src2)>;
2530 def : Pat<(or VR128:$src1, (loadv16i8 addr:$src2)),
2531 (VPORrm VR128:$src1, addr:$src2)>;
2532 def : Pat<(or VR128:$src1, (loadv8i16 addr:$src2)),
2533 (VPORrm VR128:$src1, addr:$src2)>;
2534 def : Pat<(or VR128:$src1, (loadv4i32 addr:$src2)),
2535 (VPORrm VR128:$src1, addr:$src2)>;
2537 def : Pat<(xor VR128:$src1, (loadv16i8 addr:$src2)),
2538 (VPXORrm VR128:$src1, addr:$src2)>;
2539 def : Pat<(xor VR128:$src1, (loadv8i16 addr:$src2)),
2540 (VPXORrm VR128:$src1, addr:$src2)>;
2541 def : Pat<(xor VR128:$src1, (loadv4i32 addr:$src2)),
2542 (VPXORrm VR128:$src1, addr:$src2)>;
2544 def : Pat<(X86andnp VR128:$src1, (loadv16i8 addr:$src2)),
2545 (VPANDNrm VR128:$src1, addr:$src2)>;
2546 def : Pat<(X86andnp VR128:$src1, (loadv8i16 addr:$src2)),
2547 (VPANDNrm VR128:$src1, addr:$src2)>;
2548 def : Pat<(X86andnp VR128:$src1, (loadv4i32 addr:$src2)),
2549 (VPANDNrm VR128:$src1, addr:$src2)>;
2553 def : Pat<(v16i8 (and VR128:$src1, VR128:$src2)),
2554 (PANDrr VR128:$src1, VR128:$src2)>;
2555 def : Pat<(v8i16 (and VR128:$src1, VR128:$src2)),
2556 (PANDrr VR128:$src1, VR128:$src2)>;
2557 def : Pat<(v4i32 (and VR128:$src1, VR128:$src2)),
2558 (PANDrr VR128:$src1, VR128:$src2)>;
2560 def : Pat<(v16i8 (or VR128:$src1, VR128:$src2)),
2561 (PORrr VR128:$src1, VR128:$src2)>;
2562 def : Pat<(v8i16 (or VR128:$src1, VR128:$src2)),
2563 (PORrr VR128:$src1, VR128:$src2)>;
2564 def : Pat<(v4i32 (or VR128:$src1, VR128:$src2)),
2565 (PORrr VR128:$src1, VR128:$src2)>;
2567 def : Pat<(v16i8 (xor VR128:$src1, VR128:$src2)),
2568 (PXORrr VR128:$src1, VR128:$src2)>;
2569 def : Pat<(v8i16 (xor VR128:$src1, VR128:$src2)),
2570 (PXORrr VR128:$src1, VR128:$src2)>;
2571 def : Pat<(v4i32 (xor VR128:$src1, VR128:$src2)),
2572 (PXORrr VR128:$src1, VR128:$src2)>;
2574 def : Pat<(v16i8 (X86andnp VR128:$src1, VR128:$src2)),
2575 (PANDNrr VR128:$src1, VR128:$src2)>;
2576 def : Pat<(v8i16 (X86andnp VR128:$src1, VR128:$src2)),
2577 (PANDNrr VR128:$src1, VR128:$src2)>;
2578 def : Pat<(v4i32 (X86andnp VR128:$src1, VR128:$src2)),
2579 (PANDNrr VR128:$src1, VR128:$src2)>;
2581 def : Pat<(and VR128:$src1, (memopv16i8 addr:$src2)),
2582 (PANDrm VR128:$src1, addr:$src2)>;
2583 def : Pat<(and VR128:$src1, (memopv8i16 addr:$src2)),
2584 (PANDrm VR128:$src1, addr:$src2)>;
2585 def : Pat<(and VR128:$src1, (memopv4i32 addr:$src2)),
2586 (PANDrm VR128:$src1, addr:$src2)>;
2588 def : Pat<(or VR128:$src1, (memopv16i8 addr:$src2)),
2589 (PORrm VR128:$src1, addr:$src2)>;
2590 def : Pat<(or VR128:$src1, (memopv8i16 addr:$src2)),
2591 (PORrm VR128:$src1, addr:$src2)>;
2592 def : Pat<(or VR128:$src1, (memopv4i32 addr:$src2)),
2593 (PORrm VR128:$src1, addr:$src2)>;
2595 def : Pat<(xor VR128:$src1, (memopv16i8 addr:$src2)),
2596 (PXORrm VR128:$src1, addr:$src2)>;
2597 def : Pat<(xor VR128:$src1, (memopv8i16 addr:$src2)),
2598 (PXORrm VR128:$src1, addr:$src2)>;
2599 def : Pat<(xor VR128:$src1, (memopv4i32 addr:$src2)),
2600 (PXORrm VR128:$src1, addr:$src2)>;
2602 def : Pat<(X86andnp VR128:$src1, (memopv16i8 addr:$src2)),
2603 (PANDNrm VR128:$src1, addr:$src2)>;
2604 def : Pat<(X86andnp VR128:$src1, (memopv8i16 addr:$src2)),
2605 (PANDNrm VR128:$src1, addr:$src2)>;
2606 def : Pat<(X86andnp VR128:$src1, (memopv4i32 addr:$src2)),
2607 (PANDNrm VR128:$src1, addr:$src2)>;
2611 def : Pat<(v4f32 (X86fand VR128:$src1, VR128:$src2)),
2612 (ANDPSrr VR128:$src1, VR128:$src2)>;
2613 def : Pat<(v4f32 (X86for VR128:$src1, VR128:$src2)),
2614 (ORPSrr VR128:$src1, VR128:$src2)>;
2615 def : Pat<(v4f32 (X86fxor VR128:$src1, VR128:$src2)),
2616 (XORPSrr VR128:$src1, VR128:$src2)>;
2617 def : Pat<(v4f32 (X86fandn VR128:$src1, VR128:$src2)),
2618 (ANDNPSrr VR128:$src1, VR128:$src2)>;
2620 def : Pat<(X86fand VR128:$src1, (memopv4f32 addr:$src2)),
2621 (ANDPSrm VR128:$src1, addr:$src2)>;
2622 def : Pat<(X86for VR128:$src1, (memopv4f32 addr:$src2)),
2623 (ORPSrm VR128:$src1, addr:$src2)>;
2624 def : Pat<(X86fxor VR128:$src1, (memopv4f32 addr:$src2)),
2625 (XORPSrm VR128:$src1, addr:$src2)>;
2626 def : Pat<(X86fandn VR128:$src1, (memopv4f32 addr:$src2)),
2627 (ANDNPSrm VR128:$src1, addr:$src2)>;
2865 def r_Int : I<opc, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
2866 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), []>,
2869 def m_Int : I<opc, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, intmemop:$src2),
2870 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), []>,
2892 def : Pat<(Intr (mem_frags addr:$src2)),
2894 (vt (IMPLICIT_DEF)), addr:$src2)>;
2906 def : Pat<(Intr (mem_frags addr:$src2)),
2908 (vt (IMPLICIT_DEF)), addr:$src2)>;
2917 def r : I<opc, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2),
2918 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
2921 def m : I<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
2922 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
2927 (ins VR128:$src1, VR128:$src2),
2928 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
2932 (ins VR128:$src1, intmemop:$src2),
2933 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
3480 (ins RC:$src1, RC:$src2),
3482 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
3483 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
3484 [(set RC:$dst, (DstVT (OpNode (SrcVT RC:$src1), RC:$src2)))]>,
3487 (ins RC:$src1, x86memop:$src2),
3489 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
3490 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
3492 (memop_frag addr:$src2))))]>,
3586 // src2 is always 128-bit
3588 (ins RC:$src1, VR128:$src2),
3590 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
3591 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
3592 [(set RC:$dst, (DstVT (OpNode RC:$src1, (SrcVT VR128:$src2))))]>,
3595 (ins RC:$src1, i128mem:$src2),
3597 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
3598 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
3600 (SrcVT (ld_frag addr:$src2)))))]>,
3603 (ins RC:$src1, u8imm:$src2),
3605 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
3606 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
3607 [(set RC:$dst, (DstVT (OpNode2 RC:$src1, (i8 timm:$src2))))]>,
3635 def ri : PDIi8<opc, ImmForm, (outs RC:$dst), (ins RC:$src1, u8imm:$src2),
3637 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
3638 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
3639 [(set RC:$dst, (VT (OpNode RC:$src1, (i8 timm:$src2))))]>,
3718 (ins VR128:$src1, u8imm:$src2),
3720 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
3722 (vt128 (OpNode VR128:$src1, (i8 timm:$src2))))]>,
3725 (ins i128mem:$src1, u8imm:$src2),
3727 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
3730 (i8 timm:$src2))))]>, VEX,
3736 (ins VR256:$src1, u8imm:$src2),
3738 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
3740 (vt256 (OpNode VR256:$src1, (i8 timm:$src2))))]>,
3743 (ins i256mem:$src1, u8imm:$src2),
3745 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
3748 (i8 timm:$src2))))]>, VEX, VEX_L,
3754 (outs VR128:$dst), (ins VR128:$src1, u8imm:$src2),
3756 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
3758 (vt128 (OpNode VR128:$src1, (i8 timm:$src2))))]>,
3761 (outs VR128:$dst), (ins i128mem:$src1, u8imm:$src2),
3763 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
3766 (i8 timm:$src2))))]>,
3789 (outs RC:$dst), (ins RC:$src1, RC:$src2),
3791 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
3793 "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
3795 (OutVT (OpNode (ArgVT RC:$src1), RC:$src2)))]>,
3798 (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
3800 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
3802 "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
3805 (ld_frag addr:$src2))))]>,
3814 (outs RC:$dst), (ins RC:$src1, RC:$src2),
3816 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
3818 "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
3820 (OutVT (OpNode (ArgVT RC:$src1), RC:$src2)))]>,
3823 (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
3825 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
3827 "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
3830 (ld_frag addr:$src2))))]>,
3890 (outs RC:$dst), (ins RC:$src1, RC:$src2),
3892 !strconcat(OpcodeStr,"\t{$src2, $dst|$dst, $src2}"),
3893 !strconcat(OpcodeStr,"\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
3894 [(set RC:$dst, (vt (OpNode RC:$src1, RC:$src2)))]>,
3897 (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
3899 !strconcat(OpcodeStr,"\t{$src2, $dst|$dst, $src2}"),
3900 !strconcat(OpcodeStr,"\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
3901 [(set RC:$dst, (vt (OpNode RC:$src1, (ld_frag addr:$src2))))]>,
3994 GR32orGR64:$src2, u8imm:$src3),
3996 "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}",
3997 "vpinsrw\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
3999 (X86pinsrw VR128:$src1, GR32orGR64:$src2, timm:$src3))]>,
4003 i16mem:$src2, u8imm:$src3),
4005 "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}",
4006 "vpinsrw\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
4008 (X86pinsrw VR128:$src1, (extloadi16 addr:$src2),
4016 (outs GR32orGR64:$dst), (ins VR128:$src1, u8imm:$src2),
4017 "vpextrw\t{$src2, $src1, $dst|$dst, $src1, $src2}",
4019 timm:$src2))]>,
4022 (outs GR32orGR64:$dst), (ins VR128:$src1, u8imm:$src2),
4023 "pextrw\t{$src2, $src1, $dst|$dst, $src1, $src2}",
4025 timm:$src2))]>,
4559 (outs RC:$dst), (ins RC:$src1, RC:$src2),
4561 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
4562 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
4563 [(set RC:$dst, (vt (X86Addsub RC:$src1, RC:$src2)))]>,
4566 (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
4568 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
4569 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
4570 [(set RC:$dst, (vt (X86Addsub RC:$src1, (ld_frag addr:$src2))))]>,
4612 def rr : S3DI<o, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2),
4614 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
4615 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
4616 [(set RC:$dst, (vt (OpNode RC:$src1, RC:$src2)))]>,
4619 def rm : S3DI<o, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
4621 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
4622 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
4623 [(set RC:$dst, (vt (OpNode RC:$src1, (ld_frag addr:$src2))))]>,
4632 def rr : S3I<o, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2),
4634 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
4635 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
4636 [(set RC:$dst, (vt (OpNode RC:$src1, RC:$src2)))]>,
4639 def rm : S3I<o, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
4641 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
4642 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
4643 [(set RC:$dst, (vt (OpNode RC:$src1, (ld_frag addr:$src2))))]>,
4763 (ins RC:$src1, RC:$src2),
4765 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
4766 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
4767 [(set RC:$dst, (DstVT (OpNode (OpVT RC:$src1), RC:$src2)))]>,
4770 (ins RC:$src1, x86memop:$src2),
4772 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
4773 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
4775 (DstVT (OpNode (OpVT RC:$src1), (memop_frag addr:$src2))))]>,
4785 (ins VR128:$src1, VR128:$src2),
4787 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
4788 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
4789 [(set VR128:$dst, (IntId128 VR128:$src1, VR128:$src2))]>,
4792 (ins VR128:$src1, i128mem:$src2),
4794 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
4795 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
4797 (IntId128 VR128:$src1, (ld_frag addr:$src2)))]>,
4806 (ins VR256:$src1, VR256:$src2),
4807 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
4808 [(set VR256:$dst, (IntId256 VR256:$src1, VR256:$src2))]>,
4811 (ins VR256:$src1, i256mem:$src2),
4812 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
4814 (IntId256 VR256:$src1, (load addr:$src2)))]>,
4949 (ins RC:$src1, RC:$src2, u8imm:$src3),
4951 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
4953 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
4954 [(set RC:$dst, (VT (X86PAlignr RC:$src1, RC:$src2, (i8 timm:$src3))))]>,
4958 (ins RC:$src1, x86memop:$src2, u8imm:$src3),
4960 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
4962 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
4964 (memop_frag addr:$src2),
5238 (ins VR128:$src1, u8imm:$src2),
5240 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
5242 timm:$src2))]>,
5246 (ins i8mem:$dst, VR128:$src1, u8imm:$src2),
5248 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
5249 [(store (i8 (trunc (X86pextrb (v16i8 VR128:$src1), timm:$src2))),
5263 (ins VR128:$src1, u8imm:$src2),
5265 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"), []>,
5270 (ins i16mem:$dst, VR128:$src1, u8imm:$src2),
5272 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
5273 [(store (i16 (trunc (X86pextrw (v8i16 VR128:$src1), timm:$src2))),
5292 (ins VR128:$src1, u8imm:$src2),
5294 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
5296 (extractelt (v4i32 VR128:$src1), imm:$src2))]>,
5299 (ins i32mem:$dst, VR128:$src1, u8imm:$src2),
5301 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
5302 [(store (extractelt (v4i32 VR128:$src1), imm:$src2),
5314 (ins VR128:$src1, u8imm:$src2),
5316 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
5318 (extractelt (v2i64 VR128:$src1), imm:$src2))]>,
5321 (ins i64mem:$dst, VR128:$src1, u8imm:$src2),
5323 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
5324 [(store (extractelt (v2i64 VR128:$src1), imm:$src2),
5337 (ins VR128:$src1, u8imm:$src2),
5339 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
5341 (extractelt (bc_v4i32 (v4f32 VR128:$src1)), imm:$src2))]>,
5344 (ins f32mem:$dst, VR128:$src1, u8imm:$src2),
5346 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
5347 [(store (extractelt (bc_v4i32 (v4f32 VR128:$src1)), imm:$src2),
5363 (ins VR128:$src1, GR32orGR64:$src2, u8imm:$src3),
5365 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5367 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5369 (X86pinsrb VR128:$src1, GR32orGR64:$src2, timm:$src3))]>,
5372 (ins VR128:$src1, i8mem:$src2, u8imm:$src3),
5374 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5376 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5378 (X86pinsrb VR128:$src1, (extloadi8 addr:$src2), timm:$src3))]>,
5384 def : Pat<(X86pinsrb VR128:$src1, (i32 (anyext (i8 GR8:$src2))), timm:$src3),
5386 GR8:$src2, sub_8bit), timm:$src3)>;
5394 (ins VR128:$src1, GR32:$src2, u8imm:$src3),
5396 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5398 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5400 (v4i32 (insertelt VR128:$src1, GR32:$src2, imm:$src3)))]>,
5403 (ins VR128:$src1, i32mem:$src2, u8imm:$src3),
5405 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5407 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5409 (v4i32 (insertelt VR128:$src1, (loadi32 addr:$src2), imm:$src3)))]>,
5420 (ins VR128:$src1, GR64:$src2, u8imm:$src3),
5422 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5424 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5426 (v2i64 (insertelt VR128:$src1, GR64:$src2, imm:$src3)))]>,
5429 (ins VR128:$src1, i64mem:$src2, u8imm:$src3),
5431 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5433 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5435 (v2i64 (insertelt VR128:$src1, (loadi64 addr:$src2), imm:$src3)))]>,
5451 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
5453 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5455 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5457 (X86insertps VR128:$src1, VR128:$src2, timm:$src3))]>,
5460 (ins VR128:$src1, f32mem:$src2, u8imm:$src3),
5462 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5464 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5467 (v4f32 (scalar_to_vector (loadf32 addr:$src2))),
5492 (outs RC:$dst), (ins RC:$src1, i32u8imm:$src2),
5494 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
5495 [(set RC:$dst, (VT (OpNode RC:$src1, timm:$src2)))]>,
5500 (outs RC:$dst), (ins x86memop:$src1, i32u8imm:$src2),
5502 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
5504 (VT (OpNode (mem_frag addr:$src1), timm:$src2)))]>,
5513 (outs FR32:$dst), (ins FR32:$src1, FR32:$src2, i32u8imm:$src3),
5515 "ss\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
5520 (outs FR32:$dst), (ins FR32:$src1, f32mem:$src2, i32u8imm:$src3),
5522 "ss\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
5528 (outs FR64:$dst), (ins FR64:$src1, FR64:$src2, i32u8imm:$src3),
5530 "sd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
5535 (outs FR64:$dst), (ins FR64:$src1, f64mem:$src2, i32u8imm:$src3),
5537 "sd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
5547 (outs FR32:$dst), (ins FR32:$src1, i32u8imm:$src2),
5549 "ss\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
5554 (outs FR32:$dst), (ins f32mem:$src1, i32u8imm:$src2),
5556 "ss\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
5562 (outs FR64:$dst), (ins FR64:$src1, i32u8imm:$src2),
5564 "sd\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
5569 (outs FR64:$dst), (ins f64mem:$src1, i32u8imm:$src2),
5571 "sd\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
5584 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2, i32u8imm:$src3),
5587 "ss\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5589 "ss\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5590 [(set VR128:$dst, (VT32 (OpNode VR128:$src1, VR128:$src2, timm:$src3)))]>,
5594 (outs VR128:$dst), (ins VR128:$src1, ssmem:$src2, i32u8imm:$src3),
5597 "ss\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5599 "ss\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5601 (OpNode VR128:$src1, (sse_load_f32 addr:$src2), timm:$src3))]>,
5607 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2, i32u8imm:$src3),
5610 "sd\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5612 "sd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5613 [(set VR128:$dst, (VT64 (OpNode VR128:$src1, VR128:$src2, timm:$src3)))]>,
5617 (outs VR128:$dst), (ins VR128:$src1, sdmem:$src2, i32u8imm:$src3),
5620 "sd\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5622 "sd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5624 (OpNode VR128:$src1, (sse_load_f64 addr:$src2), timm:$src3))]>,
5660 def : Pat<(X86any_VRndScale FR32:$src1, timm:$src2),
5661 (VROUNDSSri (f32 (IMPLICIT_DEF)), FR32:$src1, timm:$src2)>;
5662 def : Pat<(X86any_VRndScale FR64:$src1, timm:$src2),
5663 (VROUNDSDri (f64 (IMPLICIT_DEF)), FR64:$src1, timm:$src2)>;
5667 def : Pat<(X86any_VRndScale (loadf32 addr:$src1), timm:$src2),
5668 (VROUNDSSmi (f32 (IMPLICIT_DEF)), addr:$src1, timm:$src2)>;
5669 def : Pat<(X86any_VRndScale (loadf64 addr:$src1), timm:$src2),
5670 (VROUNDSDmi (f64 (IMPLICIT_DEF)), addr:$src1, timm:$src2)>;
5687 def : Pat<(X86any_VRndScale FR32:$src1, timm:$src2),
5688 (ROUNDSSri FR32:$src1, timm:$src2)>;
5689 def : Pat<(X86any_VRndScale FR64:$src1, timm:$src2),
5690 (ROUNDSDri FR64:$src1, timm:$src2)>;
5694 def : Pat<(X86any_VRndScale (loadf32 addr:$src1), timm:$src2),
5695 (ROUNDSSmi addr:$src1, timm:$src2)>;
5696 def : Pat<(X86any_VRndScale (loadf64 addr:$src1), timm:$src2),
5697 (ROUNDSDmi addr:$src1, timm:$src2)>;
5706 def X86ptest_commutable : PatFrag<(ops node:$src1, node:$src2),
5707 (X86ptest node:$src1, node:$src2), [{
5714 def VPTESTrr : SS48I<0x17, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src2),
5715 "vptest\t{$src2, $src1|$src1, $src2}",
5716 [(set EFLAGS, (X86ptest VR128:$src1, (v2i64 VR128:$src2)))]>,
5718 def VPTESTrm : SS48I<0x17, MRMSrcMem, (outs), (ins VR128:$src1, f128mem:$src2),
5719 "vptest\t{$src2, $src1|$src1, $src2}",
5720 [(set EFLAGS,(X86ptest VR128:$src1, (loadv2i64 addr:$src2)))]>,
5724 def VPTESTYrr : SS48I<0x17, MRMSrcReg, (outs), (ins VR256:$src1, VR256:$src2),
5725 "vptest\t{$src2, $src1|$src1, $src2}",
5726 [(set EFLAGS, (X86ptest VR256:$src1, (v4i64 VR256:$src2)))]>,
5728 def VPTESTYrm : SS48I<0x17, MRMSrcMem, (outs), (ins VR256:$src1, i256mem:$src2),
5729 "vptest\t{$src2, $src1|$src1, $src2}",
5730 [(set EFLAGS,(X86ptest VR256:$src1, (loadv4i64 addr:$src2)))]>,
5736 def PTESTrr : SS48I<0x17, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src2),
5737 "ptest\t{$src2, $src1|$src1, $src2}",
5738 [(set EFLAGS, (X86ptest VR128:$src1, (v2i64 VR128:$src2)))]>,
5740 def PTESTrm : SS48I<0x17, MRMSrcMem, (outs), (ins VR128:$src1, f128mem:$src2),
5741 "ptest\t{$src2, $src1|$src1, $src2}",
5742 [(set EFLAGS, (X86ptest VR128:$src1, (memopv2i64 addr:$src2)))]>,
5747 def : Pat<(X86ptest_commutable (loadv2i64 addr:$src2), VR128:$src1),
5748 (VPTESTrm VR128:$src1, addr:$src2)>;
5749 def : Pat<(X86ptest_commutable (loadv4i64 addr:$src2), VR256:$src1),
5750 (VPTESTYrm VR256:$src1, addr:$src2)>;
5753 def : Pat<(X86ptest_commutable (memopv2i64 addr:$src2), VR128:$src1),
5754 (PTESTrm VR128:$src1, addr:$src2)>;
5761 def rr : SS48I<opc, MRMSrcReg, (outs), (ins RC:$src1, RC:$src2),
5762 !strconcat(OpcodeStr, "\t{$src2, $src1|$src1, $src2}"),
5763 [(set EFLAGS, (X86testp RC:$src1, (vt RC:$src2)))]>,
5765 def rm : SS48I<opc, MRMSrcMem, (outs), (ins RC:$src1, x86memop:$src2),
5766 !strconcat(OpcodeStr, "\t{$src2, $src1|$src1, $src2}"),
5767 [(set EFLAGS, (X86testp RC:$src1, (mem_frag addr:$src2)))]>,
5773 def X86testp_commutable : PatFrag<(ops node:$src1, node:$src2),
5774 (X86testp node:$src1, node:$src2), [{
5794 def : Pat<(X86testp_commutable (loadv4f32 addr:$src2), VR128:$src),
5795 (VTESTPSrm VR128:$src, addr:$src2)>;
5796 def : Pat<(X86testp_commutable (loadv8f32 addr:$src2), VR256:$src),
5797 (VTESTPSYrm VR256:$src, addr:$src2)>;
5799 def : Pat<(X86testp_commutable (loadv2f64 addr:$src2), VR128:$src),
5800 (VTESTPDrm VR128:$src, addr:$src2)>;
5801 def : Pat<(X86testp_commutable (loadv4f64 addr:$src2), VR256:$src),
5802 (VTESTPDYrm VR256:$src, addr:$src2)>;
5857 (ins RC:$src1, RC:$src2),
5859 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
5860 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
5861 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2)))]>,
5864 (ins RC:$src1, x86memop:$src2),
5866 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
5867 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
5869 (OpVT (OpNode RC:$src1, (memop_frag addr:$src2))))]>,
5990 (ins RC:$src1, RC:$src2, u8imm:$src3),
5993 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5995 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5996 [(set RC:$dst, (IntId RC:$src1, RC:$src2, timm:$src3))]>,
5999 (ins RC:$src1, x86memop:$src2, u8imm:$src3),
6002 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6004 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6006 (IntId RC:$src1, (memop_frag addr:$src2), timm:$src3))]>,
6017 (ins RC:$src1, RC:$src2, u8imm:$src3),
6020 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6022 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6023 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2, timm:$src3)))]>,
6026 (ins RC:$src1, x86memop:$src2, u8imm:$src3),
6029 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6031 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6033 (OpVT (OpNode RC:$src1, (memop_frag addr:$src2), timm:$src3)))]>,
6174 (ins RC:$src1, RC:$src2, u8imm:$src3),
6177 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6179 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6180 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2, timm:$src3)))]>,
6183 (ins RC:$src1, x86memop:$src2, u8imm:$src3),
6186 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6188 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6190 (OpVT (OpNode RC:$src1, (memop_frag addr:$src2), timm:$src3)))]>,
6195 def : Pat<(OpVT (OpNode (memop_frag addr:$src2), RC:$src1, timm:$src3)),
6196 (!cast<Instruction>(NAME#"rmi") RC:$src1, addr:$src2,
6233 def : Pat<(X86Blendi (v4i64 VR256:$src1), (v4i64 VR256:$src2), timm:$src3),
6234 (VBLENDPDYrri VR256:$src1, VR256:$src2, timm:$src3)>;
6235 def : Pat<(X86Blendi VR256:$src1, (loadv4i64 addr:$src2), timm:$src3),
6236 (VBLENDPDYrmi VR256:$src1, addr:$src2, timm:$src3)>;
6237 def : Pat<(X86Blendi (loadv4i64 addr:$src2), VR256:$src1, timm:$src3),
6238 (VBLENDPDYrmi VR256:$src1, addr:$src2, (BlendCommuteImm4 timm:$src3))>;
6242 def : Pat<(X86Blendi (v2i64 VR128:$src1), (v2i64 VR128:$src2), timm:$src3),
6243 (VPBLENDWrri VR128:$src1, VR128:$src2, (BlendScaleImm2 timm:$src3))>;
6244 def : Pat<(X86Blendi VR128:$src1, (loadv2i64 addr:$src2), timm:$src3),
6245 (VPBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleImm2 timm:$src3))>;
6246 def : Pat<(X86Blendi (loadv2i64 addr:$src2), VR128:$src1, timm:$src3),
6247 (VPBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleCommuteImm2 timm:$src3))>;
6249 def : Pat<(X86Blendi (v8i32 VR256:$src1), (v8i32 VR256:$src2), timm:$src3),
6250 (VBLENDPSYrri VR256:$src1, VR256:$src2, timm:$src3)>;
6251 def : Pat<(X86Blendi VR256:$src1, (loadv8i32 addr:$src2), timm:$src3),
6252 (VBLENDPSYrmi VR256:$src1, addr:$src2, timm:$src3)>;
6253 def : Pat<(X86Blendi (loadv8i32 addr:$src2), VR256:$src1, timm:$src3),
6254 (VBLENDPSYrmi VR256:$src1, addr:$src2, (BlendCommuteImm8 timm:$src3))>;
6258 def : Pat<(X86Blendi (v4i32 VR128:$src1), (v4i32 VR128:$src2), timm:$src3),
6259 (VPBLENDWrri VR128:$src1, VR128:$src2, (BlendScaleImm4 timm:$src3))>;
6260 def : Pat<(X86Blendi VR128:$src1, (loadv4i32 addr:$src2), timm:$src3),
6261 (VPBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleImm4 timm:$src3))>;
6262 def : Pat<(X86Blendi (loadv4i32 addr:$src2), VR128:$src1, timm:$src3),
6263 (VPBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleCommuteImm4 timm:$src3))>;
6279 def : Pat<(X86Blendi (v2i64 VR128:$src1), (v2i64 VR128:$src2), timm:$src3),
6280 (PBLENDWrri VR128:$src1, VR128:$src2, (BlendScaleImm2 timm:$src3))>;
6281 def : Pat<(X86Blendi VR128:$src1, (memopv2i64 addr:$src2), timm:$src3),
6282 (PBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleImm2 timm:$src3))>;
6283 def : Pat<(X86Blendi (memopv2i64 addr:$src2), VR128:$src1, timm:$src3),
6284 (PBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleCommuteImm2 timm:$src3))>;
6286 def : Pat<(X86Blendi (v4i32 VR128:$src1), (v4i32 VR128:$src2), timm:$src3),
6287 (PBLENDWrri VR128:$src1, VR128:$src2, (BlendScaleImm4 timm:$src3))>;
6288 def : Pat<(X86Blendi VR128:$src1, (memopv4i32 addr:$src2), timm:$src3),
6289 (PBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleImm4 timm:$src3))>;
6290 def : Pat<(X86Blendi (memopv4i32 addr:$src2), VR128:$src1, timm:$src3),
6291 (PBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleCommuteImm4 timm:$src3))>;
6297 def : Pat<(insert_subvector (v4f64 VR256:$src1), (v2f64 VR128:$src2), (iPTR 0)),
6300 VR128:$src2, sub_xmm), 0x3)>;
6301 def : Pat<(insert_subvector (v8f32 VR256:$src1), (v4f32 VR128:$src2), (iPTR 0)),
6304 VR128:$src2, sub_xmm), 0xf)>;
6306 def : Pat<(insert_subvector (loadv4f64 addr:$src2), (v2f64 VR128:$src1), (iPTR 0)),
6308 VR128:$src1, sub_xmm), addr:$src2, 0xc)>;
6309 def : Pat<(insert_subvector (loadv8f32 addr:$src2), (v4f32 VR128:$src1), (iPTR 0)),
6311 VR128:$src1, sub_xmm), addr:$src2, 0xf0)>;
6320 (ins RC:$src1, RC:$src2, RC:$src3),
6322 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
6323 [(set RC:$dst, (VT (OpNode RC:$src3, RC:$src2, RC:$src1)))],
6328 (ins RC:$src1, x86memop:$src2, RC:$src3),
6330 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
6332 (OpNode RC:$src3, (mem_frag addr:$src2),
6335 // x86memop:$src2
6372 (v4i32 VR128:$src2))),
6373 (VBLENDVPSrrr VR128:$src2, VR128:$src1, VR128:$mask)>;
6375 (v2i64 VR128:$src2))),
6376 (VBLENDVPDrrr VR128:$src2, VR128:$src1, VR128:$mask)>;
6378 (v8i32 VR256:$src2))),
6379 (VBLENDVPSYrrr VR256:$src2, VR256:$src1, VR256:$mask)>;
6381 (v4i64 VR256:$src2))),
6382 (VBLENDVPDYrrr VR256:$src2, VR256:$src1, VR256:$mask)>;
6394 def : Pat<(v4f32 (X86Movss VR128:$src1, VR128:$src2)),
6395 (VBLENDPSrri VR128:$src1, VR128:$src2, (i8 1))>;
6396 def : Pat<(v4f32 (X86Movss VR128:$src1, (loadv4f32 addr:$src2))),
6397 (VBLENDPSrmi VR128:$src1, addr:$src2, (i8 1))>;
6398 def : Pat<(v4f32 (X86Movss (loadv4f32 addr:$src2), VR128:$src1)),
6399 (VBLENDPSrmi VR128:$src1, addr:$src2, (i8 0xe))>;
6401 def : Pat<(v2f64 (X86Movsd VR128:$src1, VR128:$src2)),
6402 (VBLENDPDrri VR128:$src1, VR128:$src2, (i8 1))>;
6403 def : Pat<(v2f64 (X86Movsd VR128:$src1, (loadv2f64 addr:$src2))),
6404 (VBLENDPDrmi VR128:$src1, addr:$src2, (i8 1))>;
6405 def : Pat<(v2f64 (X86Movsd (loadv2f64 addr:$src2), VR128:$src1)),
6406 (VBLENDPDrmi VR128:$src1, addr:$src2, (i8 2))>;
6431 def : Pat<(v4f32 (X86Movss VR128:$src1, VR128:$src2)),
6432 (BLENDPSrri VR128:$src1, VR128:$src2, (i8 1))>;
6433 def : Pat<(v4f32 (X86Movss VR128:$src1, (memopv4f32 addr:$src2))),
6434 (BLENDPSrmi VR128:$src1, addr:$src2, (i8 1))>;
6435 def : Pat<(v4f32 (X86Movss (memopv4f32 addr:$src2), VR128:$src1)),
6436 (BLENDPSrmi VR128:$src1, addr:$src2, (i8 0xe))>;
6438 def : Pat<(v2f64 (X86Movsd VR128:$src1, VR128:$src2)),
6439 (BLENDPDrri VR128:$src1, VR128:$src2, (i8 1))>;
6440 def : Pat<(v2f64 (X86Movsd VR128:$src1, (memopv2f64 addr:$src2))),
6441 (BLENDPDrmi VR128:$src1, addr:$src2, (i8 1))>;
6442 def : Pat<(v2f64 (X86Movsd (memopv2f64 addr:$src2), VR128:$src1)),
6443 (BLENDPDrmi VR128:$src1, addr:$src2, (i8 2))>;
6453 (ins VR128:$src1, VR128:$src2),
6455 "\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}"),
6457 (VT (OpNode XMM0, VR128:$src2, VR128:$src1)))]>,
6461 (ins VR128:$src1, x86memop:$src2),
6463 "\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}"),
6465 (OpNode XMM0, (mem_frag addr:$src2), VR128:$src1))]>,
6480 def : InstAlias<"blendvpd\t{$src2, $dst|$dst, $src2}",
6481 (BLENDVPDrr0 VR128:$dst, VR128:$src2), 0>;
6482 def : InstAlias<"blendvpd\t{$src2, $dst|$dst, $src2}",
6483 (BLENDVPDrm0 VR128:$dst, f128mem:$src2), 0>;
6484 def : InstAlias<"blendvps\t{$src2, $dst|$dst, $src2}",
6485 (BLENDVPSrr0 VR128:$dst, VR128:$src2), 0>;
6486 def : InstAlias<"blendvps\t{$src2, $dst|$dst, $src2}",
6487 (BLENDVPSrm0 VR128:$dst, f128mem:$src2), 0>;
6488 def : InstAlias<"pblendvb\t{$src2, $dst|$dst, $src2}",
6489 (PBLENDVBrr0 VR128:$dst, VR128:$src2), 0>;
6490 def : InstAlias<"pblendvb\t{$src2, $dst|$dst, $src2}",
6491 (PBLENDVBrm0 VR128:$dst, i128mem:$src2), 0>;
6495 (v4i32 VR128:$src2))),
6496 (BLENDVPSrr0 VR128:$src2, VR128:$src1)>;
6498 (v2i64 VR128:$src2))),
6499 (BLENDVPDrr0 VR128:$src2, VR128:$src1)>;
6579 (ins RC:$src1, RC:$src2),
6581 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
6582 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
6583 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2)))]>,
6586 (ins RC:$src1, x86memop:$src2),
6588 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
6589 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
6591 (OpVT (OpNode RC:$src1, (memop_frag addr:$src2))))]>,
6615 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
6616 !strconcat(asm, "\t{$src3, $src2, $src1|$src1, $src2, $src3}"),
6620 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
6621 !strconcat(asm, "\t{$src3, $src2, $src1|$src1, $src2, $src3}"),
6651 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
6652 !strconcat(asm, "\t{$src3, $src2, $src1|$src1, $src2, $src3}"),
6656 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
6657 !strconcat(asm, "\t{$src3, $src2, $src1|$src1, $src2, $src3}"),
6695 : ITy<0xF1, MRMSrcReg, t, (outs rc:$dst), (ins rc:$src1, t.RegClass:$src2),
6696 "crc32", binop_args, [(set rc:$dst, (node rc:$src1, t.RegClass:$src2))]>,
6702 : ITy<0xF1, MRMSrcMem, t, (outs rc:$dst), (ins rc:$src1, t.MemOperand:$src2),
6703 "crc32", binop_args, [(set rc:$dst, (node rc:$src1, (load addr:$src2)))]>,
6744 (ins VR128:$src1, VR128:$src2),
6746 !strconcat(OpcodeStr, "\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}"),
6747 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}")),
6749 (set VR128:$dst, (IntId VR128:$src1, VR128:$src2, XMM0)),
6750 (set VR128:$dst, (IntId VR128:$src1, VR128:$src2)))]>,
6754 (ins VR128:$src1, i128mem:$src2),
6756 !strconcat(OpcodeStr, "\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}"),
6757 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}")),
6760 (memop addr:$src2), XMM0)),
6762 (memop addr:$src2))))]>, T8,
6768 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
6769 "sha1rnds4\t{$src3, $src2, $dst|$dst, $src2, $src3}",
6771 (int_x86_sha1rnds4 VR128:$src1, VR128:$src2,
6775 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
6776 "sha1rnds4\t{$src3, $src2, $dst|$dst, $src2, $src3}",
6779 (memop addr:$src2),
6811 !if(Is2Addr, "\t{$src2, $dst|$dst, $src2}",
6812 "\t{$src2, $src1, $dst|$dst, $src1, $src2}") in {
6814 (ins RC:$src1, RC:$src2), "",
6815 [(set RC:$dst, (IntId RC:$src1, RC:$src2))]>,
6818 (ins RC:$src1, MemOp:$src2), "",
6819 [(set RC:$dst, (IntId RC:$src1, (ld_frag addr:$src2)))]>,
6890 (ins VR128:$src1, u8imm:$src2),
6891 "vaeskeygenassist\t{$src2, $src1, $dst|$dst, $src1, $src2}",
6893 (int_x86_aesni_aeskeygenassist VR128:$src1, timm:$src2))]>,
6896 (ins i128mem:$src1, u8imm:$src2),
6897 "vaeskeygenassist\t{$src2, $src1, $dst|$dst, $src1, $src2}",
6899 (int_x86_aesni_aeskeygenassist (load addr:$src1), timm:$src2))]>,
6903 (ins VR128:$src1, u8imm:$src2),
6904 "aeskeygenassist\t{$src2, $src1, $dst|$dst, $src1, $src2}",
6906 (int_x86_aesni_aeskeygenassist VR128:$src1, timm:$src2))]>,
6909 (ins i128mem:$src1, u8imm:$src2),
6910 "aeskeygenassist\t{$src2, $src1, $dst|$dst, $src1, $src2}",
6912 (int_x86_aesni_aeskeygenassist (memop addr:$src1), timm:$src2))]>,
6930 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
6931 "pclmulqdq\t{$src3, $src2, $dst|$dst, $src2, $src3}",
6933 (int_x86_pclmulqdq VR128:$src1, VR128:$src2, timm:$src3))]>,
6937 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
6938 "pclmulqdq\t{$src3, $src2, $dst|$dst, $src2, $src3}",
6940 (int_x86_pclmulqdq VR128:$src1, (memop addr:$src2),
6945 def : Pat<(int_x86_pclmulqdq (memop addr:$src2), VR128:$src1,
6947 (PCLMULQDQrmi VR128:$src1, addr:$src2,
6967 (ins RC:$src1, RC:$src2, u8imm:$src3),
6968 "vpclmulqdq\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
6970 (IntId RC:$src1, RC:$src2, timm:$src3))]>,
6974 (ins RC:$src1, MemOp:$src2, u8imm:$src3),
6975 "vpclmulqdq\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
6977 (IntId RC:$src1, (LdFrag addr:$src2), timm:$src3))]>,
6982 def : Pat<(IntId (LdFrag addr:$src2), RC:$src1, (i8 timm:$src3)),
6983 (!cast<Instruction>(NAME#"rmi") RC:$src1, addr:$src2,
6997 def : InstAlias<"vpclmul"#Hi#Lo#"dq\t{$src2, $src1, $dst|$dst, $src1, $src2}",
6998 (!cast<Instruction>(InstStr # "rri") RC:$dst, RC:$src1, RC:$src2,
7000 def : InstAlias<"vpclmul"#Hi#Lo#"dq\t{$src2, $src1, $dst|$dst, $src1, $src2}",
7001 (!cast<Instruction>(InstStr # "rmi") RC:$dst, RC:$src1, MemOp:$src2,
7039 (ins VR128:$src, VR128:$src2, u8imm:$len, u8imm:$idx),
7040 "insertq\t{$idx, $len, $src2, $src|$src, $src2, $len, $idx}",
7041 [(set VR128:$dst, (X86insertqi VR128:$src, VR128:$src2,
7168 (ins VR256:$src1, VR256:$src2, u8imm:$src3),
7169 "vperm2f128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}", []>,
7172 (ins VR256:$src1, f256mem:$src2, u8imm:$src3),
7173 "vperm2f128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}", []>,
7183 def : Pat<(VT (X86VPerm2x128 VR256:$src1, VR256:$src2, (i8 timm:$imm))),
7184 (!cast<Instruction>(InstrStr#rr) VR256:$src1, VR256:$src2, timm:$imm)>;
7185 def : Pat<(VT (X86VPerm2x128 VR256:$src1, (memop_frag addr:$src2), (i8 timm:$imm))),
7186 (!cast<Instruction>(InstrStr#rm) VR256:$src1, addr:$src2, timm:$imm)>;
7188 def : Pat<(VT (X86VPerm2x128 (memop_frag addr:$src2), VR256:$src1, (i8 timm:$imm))),
7189 (!cast<Instruction>(InstrStr#rm) VR256:$src1, addr:$src2,
7211 (ins VR256:$src1, VR128:$src2, u8imm:$src3),
7212 "vinsertf128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
7216 (ins VR256:$src1, f128mem:$src2, u8imm:$src3),
7217 "vinsertf128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
7231 def : Pat<(vinsert128_insert:$ins (To VR256:$src1), (From VR128:$src2),
7233 (!cast<Instruction>(InstrStr#rr) VR256:$src1, VR128:$src2,
7236 (From (frommemop_frag addr:$src2)),
7238 (!cast<Instruction>(InstrStr#rm) VR256:$src1, addr:$src2,
7242 (From VR128:$src2),
7245 (INSERT_SUBREG (To (IMPLICIT_DEF)), VR128:$src2, sub_xmm),
7268 (ins VR256:$src1, u8imm:$src2),
7269 "vextractf128\t{$src2, $src1, $dst|$dst, $src1, $src2}",
7273 (ins f128mem:$dst, VR256:$src1, u8imm:$src2),
7274 "vextractf128\t{$src2, $src1, $dst|$dst, $src1, $src2}",
7313 (ins VR128:$src1, f128mem:$src2),
7314 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
7315 [(set VR128:$dst, (IntLd addr:$src2, VR128:$src1))]>,
7318 (ins VR256:$src1, f256mem:$src2),
7319 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
7320 [(set VR256:$dst, (IntLd256 addr:$src2, VR256:$src1))]>,
7323 (ins f128mem:$dst, VR128:$src1, VR128:$src2),
7324 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
7325 [(IntSt addr:$dst, VR128:$src1, VR128:$src2)]>,
7328 (ins f256mem:$dst, VR256:$src1, VR256:$src2),
7329 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
7330 [(IntSt256 addr:$dst, VR256:$src1, VR256:$src2)]>,
7358 (ins VR128:$src1, VR128:$src2, VR128:$src3),
7359 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
7361 VR128:$src2, VR128:$src3)))]>,
7365 (ins VR128:$src1, VR128:$src2, i128mem:$src3),
7366 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
7367 [(set VR128:$dst, (v4i32 (OpNode VR128:$src1, VR128:$src2,
7375 (ins VR256:$src1, VR256:$src2, VR256:$src3),
7376 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
7378 VR256:$src2, VR256:$src3)))]>,
7382 (ins VR256:$src1, VR256:$src2, i256mem:$src3),
7383 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
7384 [(set VR256:$dst, (v8i32 (OpNode VR256:$src1, VR256:$src2,
7398 (X86vpmaddwd_su VR256:$src2, VR256:$src3))),
7399 (VPDPWSSDYrr VR256:$src1, VR256:$src2, VR256:$src3)>;
7401 (X86vpmaddwd_su VR256:$src2, (load addr:$src3)))),
7402 (VPDPWSSDYrm VR256:$src1, VR256:$src2, addr:$src3)>;
7404 (X86vpmaddwd_su VR128:$src2, VR128:$src3))),
7405 (VPDPWSSDrr VR128:$src1, VR128:$src2, VR128:$src3)>;
7407 (X86vpmaddwd_su VR128:$src2, (load addr:$src3)))),
7408 (VPDPWSSDrm VR128:$src1, VR128:$src2, addr:$src3)>;
7423 (ins RC:$src1, RC:$src2),
7424 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
7425 [(set RC:$dst, (f_vt (X86VPermilpv RC:$src1, (i_vt RC:$src2))))]>, VEX, VVVV,
7428 (ins RC:$src1, x86memop_i:$src2),
7429 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
7431 (i_vt (load addr:$src2)))))]>, VEX, VVVV,
7435 (ins RC:$src1, u8imm:$src2),
7436 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
7437 [(set RC:$dst, (f_vt (X86VPermilpi RC:$src1, (i8 timm:$src2))))]>, VEX,
7440 (ins x86memop_f:$src1, u8imm:$src2),
7441 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
7443 (f_vt (X86VPermilpi (load addr:$src1), (i8 timm:$src2))))]>, VEX,
7504 (ins RC:$src1, i32u8imm:$src2),
7505 "vcvtps2ph\t{$src2, $src1, $dst|$dst, $src1, $src2}",
7506 [(set VR128:$dst, (X86any_cvtps2ph RC:$src1, timm:$src2))]>,
7510 (ins x86memop:$dst, RC:$src1, i32u8imm:$src2),
7511 "vcvtps2ph\t{$src2, $src1, $dst|$dst, $src1, $src2}", []>,
7533 (bc_v2f64 (v8i16 (X86any_cvtps2ph VR128:$src1, timm:$src2))),
7535 (VCVTPS2PHmr addr:$dst, VR128:$src1, timm:$src2)>;
7537 (bc_v2i64 (v8i16 (X86any_cvtps2ph VR128:$src1, timm:$src2))),
7539 (VCVTPS2PHmr addr:$dst, VR128:$src1, timm:$src2)>;
7540 def : Pat<(store (v8i16 (X86any_cvtps2ph VR256:$src1, timm:$src2)), addr:$dst),
7541 (VCVTPS2PHYmr addr:$dst, VR256:$src1, timm:$src2)>;
7555 (ins RC:$src1, RC:$src2, u8imm:$src3),
7557 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
7558 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2, timm:$src3)))]>,
7561 (ins RC:$src1, x86memop:$src2, u8imm:$src3),
7563 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
7565 (OpVT (OpNode RC:$src1, (load addr:$src2), timm:$src3)))]>,
7569 def : Pat<(OpVT (OpNode (load addr:$src2), RC:$src1, timm:$src3)),
7570 (!cast<Instruction>(NAME#"rmi") RC:$src1, addr:$src2,
7582 def : Pat<(X86Blendi (v4i64 VR256:$src1), (v4i64 VR256:$src2), timm:$src3),
7583 (VPBLENDDYrri VR256:$src1, VR256:$src2, (BlendScaleImm4 timm:$src3))>;
7584 def : Pat<(X86Blendi VR256:$src1, (loadv4i64 addr:$src2), timm:$src3),
7585 (VPBLENDDYrmi VR256:$src1, addr:$src2, (BlendScaleImm4 timm:$src3))>;
7586 def : Pat<(X86Blendi (loadv4i64 addr:$src2), VR256:$src1, timm:$src3),
7587 (VPBLENDDYrmi VR256:$src1, addr:$src2, (BlendScaleCommuteImm4 timm:$src3))>;
7589 def : Pat<(X86Blendi (v2i64 VR128:$src1), (v2i64 VR128:$src2), timm:$src3),
7590 (VPBLENDDrri VR128:$src1, VR128:$src2, (BlendScaleImm2to4 timm:$src3))>;
7591 def : Pat<(X86Blendi VR128:$src1, (loadv2i64 addr:$src2), timm:$src3),
7592 (VPBLENDDrmi VR128:$src1, addr:$src2, (BlendScaleImm2to4 timm:$src3))>;
7593 def : Pat<(X86Blendi (loadv2i64 addr:$src2), VR128:$src1, timm:$src3),
7594 (VPBLENDDrmi VR128:$src1, addr:$src2, (BlendScaleCommuteImm2to4 timm:$src3))>;
7602 def : Pat<(insert_subvector (v8i32 VR256:$src1), (v4i32 VR128:$src2), (iPTR 0)),
7605 VR128:$src2, sub_xmm), 0xf)>;
7606 def : Pat<(insert_subvector (v4i64 VR256:$src1), (v2i64 VR128:$src2), (iPTR 0)),
7609 VR128:$src2, sub_xmm), 0xf)>;
7610 def : Pat<(insert_subvector (v16i16 VR256:$src1), (v8i16 VR128:$src2), (iPTR 0)),
7613 VR128:$src2, sub_xmm), 0xf)>;
7614 def : Pat<(insert_subvector (v16f16 VR256:$src1), (v8f16 VR128:$src2), (iPTR 0)),
7617 VR128:$src2, sub_xmm), 0xf)>;
7618 def : Pat<(insert_subvector (v32i8 VR256:$src1), (v16i8 VR128:$src2), (iPTR 0)),
7621 VR128:$src2, sub_xmm), 0xf)>;
7623 def : Pat<(insert_subvector (loadv8i32 addr:$src2), (v4i32 VR128:$src1), (iPTR 0)),
7625 VR128:$src1, sub_xmm), addr:$src2, 0xf0)>;
7626 def : Pat<(insert_subvector (loadv4i64 addr:$src2), (v2i64 VR128:$src1), (iPTR 0)),
7628 VR128:$src1, sub_xmm), addr:$src2, 0xf0)>;
7629 def : Pat<(insert_subvector (loadv16i16 addr:$src2), (v8i16 VR128:$src1), (iPTR 0)),
7631 VR128:$src1, sub_xmm), addr:$src2, 0xf0)>;
7632 def : Pat<(insert_subvector (loadv16f16 addr:$src2), (v8f16 VR128:$src1), (iPTR 0)),
7634 VR128:$src1, sub_xmm), addr:$src2, 0xf0)>;
7635 def : Pat<(insert_subvector (loadv32i8 addr:$src2), (v16i8 VR128:$src1), (iPTR 0)),
7637 VR128:$src1, sub_xmm), addr:$src2, 0xf0)>;
7811 (ins VR256:$src1, VR256:$src2),
7813 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
7815 (OpVT (X86VPermv VR256:$src1, VR256:$src2)))]>,
7818 (ins VR256:$src1, memOp:$src2),
7820 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
7823 (load addr:$src2))))]>,
7837 (ins VR256:$src1, u8imm:$src2),
7839 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
7841 (OpVT (X86VPermi VR256:$src1, (i8 timm:$src2))))]>,
7844 (ins memOp:$src1, u8imm:$src2),
7846 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
7849 (i8 timm:$src2))))]>,
7865 (ins VR256:$src1, VR256:$src2, u8imm:$src3),
7866 "vperm2i128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}", []>,
7869 (ins VR256:$src1, f256mem:$src2, u8imm:$src3),
7870 "vperm2i128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}", []>,
7887 (ins VR256:$src1, VR128:$src2, u8imm:$src3),
7888 "vinserti128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
7892 (ins VR256:$src1, i128mem:$src2, u8imm:$src3),
7893 "vinserti128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
7913 (ins VR256:$src1, u8imm:$src2),
7914 "vextracti128\t{$src2, $src1, $dst|$dst, $src1, $src2}", []>,
7918 (ins i128mem:$dst, VR256:$src1, u8imm:$src2),
7919 "vextracti128\t{$src2, $src1, $dst|$dst, $src1, $src2}", []>,
7943 (ins VR128:$src1, i128mem:$src2),
7944 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
7945 [(set VR128:$dst, (IntLd128 addr:$src2, VR128:$src1))]>,
7948 (ins VR256:$src1, i256mem:$src2),
7949 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
7950 [(set VR256:$dst, (IntLd256 addr:$src2, VR256:$src1))]>,
7953 (ins i128mem:$dst, VR128:$src1, VR128:$src2),
7954 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
7955 [(IntSt128 addr:$dst, VR128:$src1, VR128:$src2)]>,
7958 (ins i256mem:$dst, VR256:$src1, VR256:$src2),
7959 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
7960 [(IntSt256 addr:$dst, VR256:$src1, VR256:$src2)]>,
8015 (ins VR128:$src1, VR128:$src2),
8016 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8018 (vt128 (OpNode VR128:$src1, (vt128 VR128:$src2))))]>,
8021 (ins VR128:$src1, i128mem:$src2),
8022 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8025 (vt128 (load addr:$src2)))))]>,
8029 (ins VR256:$src1, VR256:$src2),
8030 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8032 (vt256 (OpNode VR256:$src1, (vt256 VR256:$src2))))]>,
8035 (ins VR256:$src1, i256mem:$src2),
8036 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8039 (vt256 (load addr:$src2)))))]>,
8060 (ins VR128:$src1, memop128:$src2, VR128:$mask),
8062 "\t{$mask, $src2, $dst|$dst, $src2, $mask}"),
8065 (ins RC256:$src1, memop256:$src2, RC256:$mask),
8067 "\t{$mask, $src2, $dst|$dst, $src2, $mask}"),
8111 OpcodeStr#"\t{$src2, $dst|$dst, $src2}",
8112 OpcodeStr#"\t{$src2, $src1, $dst|$dst, $src1, $src2}") in {
8114 def rr : PDI<0xCF, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2), "",
8115 [(set RC:$dst, (OpVT (X86GF2P8mulb RC:$src1, RC:$src2)))]>,
8118 def rm : PDI<0xCF, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, X86MemOp:$src2), "",
8120 (MemOpFrag addr:$src2))))]>,
8130 OpStr#"\t{$src3, $src2, $dst|$dst, $src2, $src3}",
8131 OpStr#"\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}") in {
8133 (ins RC:$src1, RC:$src2, u8imm:$src3), "",
8134 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2, timm:$src3)))],
8137 (ins RC:$src1, X86MemOp:$src2, u8imm:$src3), "",
8139 (MemOpFrag addr:$src2),
8186 (ins VR128:$src1, VR128:$src2, VR128:$src3),
8187 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8188 [(set VR128:$dst, (v2i64 (OpNode VR128:$src2,
8193 (ins VR128:$src1, VR128:$src2, i128mem:$src3),
8194 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8195 [(set VR128:$dst, (v2i64 (OpNode VR128:$src2,
8200 (ins VR256:$src1, VR256:$src2, VR256:$src3),
8201 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8202 [(set VR256:$dst, (v4i64 (OpNode VR256:$src2,
8207 (ins VR256:$src1, VR256:$src2, i256mem:$src3),
8208 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8209 [(set VR256:$dst, (v4i64 (OpNode VR256:$src2,
8226 (ins RC:$src1, RC:$src2, RC:$src3),
8227 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8228 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2, RC:$src3)))]>,
8231 (ins RC:$src1, RC:$src2, X86memop:$src3),
8232 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8233 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2,
8344 (ins VR256:$src1, VR128:$src2),
8345 "vsha512msg1\t{$src2, $dst|$dst, $src2}",
8347 (int_x86_vsha512msg1 VR256:$src1, VR128:$src2))]>, VEX_L,
8350 (ins VR256:$src1, VR256:$src2),
8351 "vsha512msg2\t{$src2, $dst|$dst, $src2}",
8353 (int_x86_vsha512msg2 VR256:$src1, VR256:$src2))]>, VEX_L,
8356 (ins VR256:$src1, VR256:$src2, VR128:$src3),
8357 "vsha512rnds2\t{$src3, $src2, $dst|$dst, $src2, $src3}",
8359 (int_x86_vsha512rnds2 VR256:$src1, VR256:$src2, VR128:$src3))]>,
8367 (ins VR128:$src1, VR128:$src2, VR128:$src3),
8368 !strconcat(OpStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8371 VR128:$src2, VR128:$src3))]>,
8374 (ins VR128:$src1, VR128:$src2, i128mem:$src3),
8375 !strconcat(OpStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8378 VR128:$src2, (loadv4i32 addr:$src3)))]>,
8384 (ins VR128:$src1, VR128:$src2, VR128:$src3, i32u8imm:$src4),
8385 "vsm3rnds2\t{$src4, $src3, $src2, $dst|$dst, $src2, $src3, $src4}",
8388 VR128:$src2, VR128:$src3, timm:$src4))]>,
8391 (ins VR128:$src1, VR128:$src2, i128mem:$src3, i32u8imm:$src4),
8392 "vsm3rnds2\t{$src4, $src3, $src2, $dst|$dst, $src2, $src3, $src4}",
8395 VR128:$src2, (loadv4i32 addr:$src3), timm:$src4))]>,
8409 (ins RC:$src1, RC:$src2),
8410 !strconcat(OpStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8412 RC:$src2))]>,
8415 (ins RC:$src1, MemOp:$src2),
8416 !strconcat(OpStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8418 (LD addr:$src2)))]>,
8432 (ins VR128:$src1, VR128:$src2, VR128:$src3),
8433 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8436 VR128:$src1, VR128:$src2, VR128:$src3)))]>,
8440 (ins VR128:$src1, VR128:$src2, i128mem:$src3),
8441 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8444 VR128:$src1, VR128:$src2, (loadv4i32 addr:$src3))))]>,
8449 (ins VR256:$src1, VR256:$src2, VR256:$src3),
8450 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8453 VR256:$src1, VR256:$src2, VR256:$src3)))]>,
8457 (ins VR256:$src1, VR256:$src2, i256mem:$src3),
8458 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8461 VR256:$src1, VR256:$src2, (loadv8i32 addr:$src3))))]>,