Lines Matching refs:SrcReg2
1431 Register SrcReg, SrcReg2; in convertToThreeAddress() local
1573 if (!classifyLEAReg(MI, Src2, Opc, /*AllowSP=*/false, SrcReg2, isKill2, in convertToThreeAddress()
1583 SrcReg = SrcReg2; in convertToThreeAddress()
1596 NewMI = addRegReg(MIB, SrcReg, isKill, SrcReg2, isKill2); in convertToThreeAddress()
1600 if (SrcReg2 != Src2.getReg()) in convertToThreeAddress()
1601 LV->getVarInfo(SrcReg2).Kills.push_back(NewMI); in convertToThreeAddress()
1602 if (SrcReg != SrcReg2 && SrcReg != Src.getReg()) in convertToThreeAddress()
2039 if (SrcReg2) in convertToThreeAddress()
2040 LIS->getInterval(SrcReg2); in convertToThreeAddress()
4766 Register &SrcReg2, int64_t &CmpMask, in analyzeCompare() argument
4776 SrcReg2 = 0; in analyzeCompare()
4790 SrcReg2 = 0; in analyzeCompare()
4799 SrcReg2 = MI.getOperand(2).getReg(); in analyzeCompare()
4808 SrcReg2 = 0; in analyzeCompare()
4821 SrcReg2 = MI.getOperand(1).getReg(); in analyzeCompare()
4833 SrcReg2 = 0; in analyzeCompare()
4842 Register SrcReg, Register SrcReg2, in isRedundantFlagInstr() argument
4862 if (SrcReg == OISrcReg && SrcReg2 == OISrcReg2) { in isRedundantFlagInstr()
4866 if (SrcReg == OISrcReg2 && SrcReg2 == OISrcReg) { in isRedundantFlagInstr()
5204 Register SrcReg2, int64_t CmpMask, in optimizeCompareInstr() argument
5264 if (SrcReg2.isPhysical()) in optimizeCompareInstr()
5345 if (isRedundantFlagInstr(CmpInstr, SrcReg, SrcReg2, CmpMask, CmpValue, in optimizeCompareInstr()