Lines Matching refs:src1
40 (ins RC:$src1, RC:$src2, RC:$src3),
43 [(set RC:$dst, (VT (Op RC:$src2, RC:$src1, RC:$src3)))]>,
48 (ins RC:$src1, RC:$src2, x86memop:$src3),
51 [(set RC:$dst, (VT (Op RC:$src2, RC:$src1,
61 (ins RC:$src1, RC:$src2, RC:$src3),
68 (ins RC:$src1, RC:$src2, x86memop:$src3),
72 RC:$src1)))]>,
81 (ins RC:$src1, RC:$src2, RC:$src3),
90 (ins RC:$src1, RC:$src2, x86memop:$src3),
93 [(set RC:$dst, (VT (Op (MemFrag addr:$src3), RC:$src1,
98 let Constraints = "$src1 = $dst", hasSideEffects = 0, isCommutable = 1,
182 (ins RC:$src1, RC:$src2, RC:$src3),
185 [(set RC:$dst, (OpNode RC:$src2, RC:$src1, RC:$src3))]>,
190 (ins RC:$src1, RC:$src2, x86memop:$src3),
194 (OpNode RC:$src2, RC:$src1, (load addr:$src3)))]>,
203 (ins RC:$src1, RC:$src2, RC:$src3),
210 (ins RC:$src1, RC:$src2, x86memop:$src3),
214 (OpNode RC:$src2, (load addr:$src3), RC:$src1))]>,
223 (ins RC:$src1, RC:$src2, RC:$src3),
232 (ins RC:$src1, RC:$src2, x86memop:$src3),
236 (OpNode (load addr:$src3), RC:$src1, RC:$src2))]>,
240 let Constraints = "$src1 = $dst", isCommutable = 1, isCodeGenOnly = 1,
267 let Constraints = "$src1 = $dst", isCommutable = 1, hasSideEffects = 0,
273 (ins RC:$src1, RC:$src2, RC:$src3),
280 (ins RC:$src1, RC:$src2, memopr:$src3),
336 def : Pat<(VT (Move (VT VR128:$src1), (VT (scalar_to_vector
338 (EltVT (extractelt (VT VR128:$src1), (iPTR 0))),
341 VR128:$src1, (VT (COPY_TO_REGCLASS RC:$src2, VR128)),
344 def : Pat<(VT (Move (VT VR128:$src1), (VT (scalar_to_vector
346 (EltVT (extractelt (VT VR128:$src1), (iPTR 0)))))))),
348 VR128:$src1, (VT (COPY_TO_REGCLASS RC:$src2, VR128)),
351 def : Pat<(VT (Move (VT VR128:$src1), (VT (scalar_to_vector
353 (EltVT (extractelt (VT VR128:$src1), (iPTR 0))),
356 VR128:$src1, (VT (COPY_TO_REGCLASS RC:$src2, VR128)),
359 def : Pat<(VT (Move (VT VR128:$src1), (VT (scalar_to_vector
360 (Op (EltVT (extractelt (VT VR128:$src1), (iPTR 0))),
363 VR128:$src1, (VT (COPY_TO_REGCLASS RC:$src2, VR128)),
366 def : Pat<(VT (Move (VT VR128:$src1), (VT (scalar_to_vector
368 (EltVT (extractelt (VT VR128:$src1), (iPTR 0)))))))),
370 VR128:$src1, (VT (COPY_TO_REGCLASS RC:$src2, VR128)),
395 (ins RC:$src1, RC:$src2, RC:$src3),
397 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
399 (OpVT (OpNode RC:$src1, RC:$src2, RC:$src3)))]>, REX_W, VEX_LIG,
402 (ins RC:$src1, RC:$src2, x86memop:$src3),
404 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
405 [(set RC:$dst, (OpNode RC:$src1, RC:$src2,
409 (ins RC:$src1, x86memop:$src2, RC:$src3),
411 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
413 (OpNode RC:$src1, (mem_frag addr:$src2), RC:$src3))]>, VEX_LIG,
423 (ins RC:$src1, RC:$src2, RC:$src3),
425 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"), []>,
434 (ins VR128:$src1, VR128:$src2, VR128:$src3),
436 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
440 (ins VR128:$src1, VR128:$src2, memop:$src3),
442 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
447 (ins VR128:$src1, memop:$src2, VR128:$src3),
449 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
458 (ins VR128:$src1, VR128:$src2, VR128:$src3),
460 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
472 (ins VR128:$src1, VR128:$src2, VR128:$src3),
474 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
476 (OpVT128 (OpNode VR128:$src1, VR128:$src2, VR128:$src3)))]>,
479 (ins VR128:$src1, VR128:$src2, f128mem:$src3),
481 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
482 [(set VR128:$dst, (OpNode VR128:$src1, VR128:$src2,
486 (ins VR128:$src1, f128mem:$src2, VR128:$src3),
488 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
490 (OpNode VR128:$src1, (ld_frag128 addr:$src2), VR128:$src3))]>,
499 (ins VR256:$src1, VR256:$src2, VR256:$src3),
501 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
503 (OpVT256 (OpNode VR256:$src1, VR256:$src2, VR256:$src3)))]>,
506 (ins VR256:$src1, VR256:$src2, f256mem:$src3),
508 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
509 [(set VR256:$dst, (OpNode VR256:$src1, VR256:$src2,
513 (ins VR256:$src1, f256mem:$src2, VR256:$src3),
515 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
516 [(set VR256:$dst, (OpNode VR256:$src1,
527 (ins VR128:$src1, VR128:$src2, VR128:$src3),
529 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"), []>,
532 (ins VR256:$src1, VR256:$src2, VR256:$src3),
534 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"), []>,
602 (Op RC:$src1, RC:$src2, RC:$src3))))),
604 (VT (COPY_TO_REGCLASS RC:$src1, VR128)),
609 (Op RC:$src1, RC:$src2,
612 (VT (COPY_TO_REGCLASS RC:$src1, VR128)),
616 (Op RC:$src1, (mem_frag addr:$src2),
619 (VT (COPY_TO_REGCLASS RC:$src1, VR128)), addr:$src2,