Lines Matching +full:mbi +full:- +full:alias
1 //===-- X86InstrAVX512.td - AVX512 Instruction Set ---------*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
13 //===----------------------------------------------------------------------===//
15 // This multiclass generates the masking variants from the non-masking
85 // This multiclass generates the unconditional/non-masking, the masking and
86 // the zero-masking variant of the vector instruction. In the masking case, the
88 // This version uses a separate dag for non-masking and masking.
108 // This multiclass generates the unconditional/non-masking, the masking and
109 // the zero-masking variant of the vector instruction. In the masking case, the
127 // This multiclass generates the unconditional/non-masking, the masking and
128 // the zero-masking variant of the scalar instruction.
284 // Alias instruction that maps zero vector to pxor / xorp* for AVX-512.
287 // We set canFoldAsLoad because this can be converted to a constant-pool
288 // load of an all-zeros value if folding it would be beneficial.
306 // Alias instructions that allow VPTERNLOG to be used with a mask to create
345 // Alias instructions that map fld0 to xorps for sse or vxorps for avx.
359 //===----------------------------------------------------------------------===//
360 // AVX-512 - VECTOR INSERT
649 // vinsertps - insert f32 to XMM
667 //===----------------------------------------------------------------------===//
668 // AVX-512 VECTOR EXTRACT
669 //---
776 // TODO - replace WriteFStore/WriteVecStore with X86SchedWriteMoveLSWidths types.
827 // A 128-bit extract from bits [255:128] of a 512-bit vector should use a
828 // smaller extract to enable EVEX->VEX.
860 // A 128-bit extract from bits [255:128] of a 512-bit vector should use a
861 // smaller extract to enable EVEX->VEX.
1000 // vextractps - extract 32 bits from XMM
1014 //===---------------------------------------------------------------------===//
1015 // AVX-512 BROADCAST
1016 //---
1336 //===----------------------------------------------------------------------===//
1337 // AVX-512 BROADCAST SUBVECTORS
1582 //===----------------------------------------------------------------------===//
1583 // AVX-512 BROADCAST MASK TO VECTOR REGISTER
1584 //---
1608 //===----------------------------------------------------------------------===//
1609 // -- VPERMI2 - 3 source operands form --
1815 //===----------------------------------------------------------------------===//
1816 // AVX-512 - BLEND using mask
1931 //===----------------------------------------------------------------------===//
1933 //===----------------------------------------------------------------------===//
1935 // avx512_cmp_scalar - AVX512 CMPSS and CMPSD
2451 // ----------------------------------------------------------------
2611 //-----------------------------------------------------------------
2613 // - copy between mask registers
2614 // - load/store mask registers
2615 // - copy from GPR to mask register and vice versa
2780 // - KNOT
2804 // TODO - do we need a X86SchedWriteWidths::KMASK type?
2807 // KNL does not support KMOVB, 8-bit mask is promoted to 16-bit
2820 // - KAND, KANDN, KOR, KXNOR, KXOR
2847 // TODO - do we need a X86SchedWriteWidths::KMASK type?
2857 // With AVX512F, 8-bit mask is promoted to 16-bit mask,
2930 // TODO - do we need a X86SchedWriteWidths::KMASK type?
2963 // Patterns for comparing 128/256-bit integer vectors using 512-bit instruction.
3146 // With AVX-512 only, 8-bit mask is promoted to 16-bit mask.
3194 //===----------------------------------------------------------------------===//
3195 // AVX-512 - Aligned and unaligned load and store
3506 // Patterns for handling v8i1 selects of 256-bit vectors when VLX isn't
3507 // available. Use a 512-bit operation and extract.
3535 // 512-bit load.
3557 // 512-bit store.
3581 // 128-bit load.
3603 // 128-bit store.
3625 // 256-bit load.
3647 // 256-bit store.
3893 //===----------------------------------------------------------------------===//
3894 // AVX-512 MOVSH, MOVSS, MOVSD
3895 //===----------------------------------------------------------------------===//
4024 // bit masked store directly. Codegen will widen 128-bit masked store to 512
4097 // bit masked load directly. Codegen will widen 128-bit masked load to 512
4415 // Use 128-bit blends for OptForSpeed since BLENDs have better throughput than
4416 // VMOVSS/SD. Unfortunately, loses the ability to use XMM16-31.
4437 // 256-bit types
4444 // 512-bit types
4505 // AVX 128-bit movd/movq instruction write zeros in the high 128-bit part.
4517 // Use regular 128-bit instructions to match 512-bit scalar_to_vec+zext.
4546 //===----------------------------------------------------------------------===//
4547 // AVX-512 - Non-temporals
4548 //===----------------------------------------------------------------------===//
4662 //===----------------------------------------------------------------------===//
4663 // AVX-512 - Integer arithmetic
5077 //===----------------------------------------------------------------------===//
5078 // AVX-512 Logical Instructions
5079 //===----------------------------------------------------------------------===//
5218 // Masked register-register logical operations.
5231 // Masked register-memory logical operations.
5249 // Register-broadcast logical operations.
5346 //===----------------------------------------------------------------------===//
5347 // AVX-512 FP arithmetic
5348 //===----------------------------------------------------------------------===//
5486 // MIN/MAX nodes are commutable under "unsafe-fp-math". In this case we use
5803 //===----------------------------------------------------------------------===//
5804 // AVX-512 VPTESTM instructions
5805 //===----------------------------------------------------------------------===//
5893 //===----------------------------------------------------------------------===//
5894 // AVX-512 Shift instructions
5895 //===----------------------------------------------------------------------===//
5919 defm mbi : AVX512_maskable<opc, ImmFormM, _, (outs _.RC:$dst),
5929 // src2 is always 128-bit
6073 //===-------------------------------------------------------------------===//
6075 //===-------------------------------------------------------------------===//
6284 //===-------------------------------------------------------------------===//
6285 // 1-src variable permutation VPERMW/D/Q
6286 //===-------------------------------------------------------------------===//
6349 //===----------------------------------------------------------------------===//
6350 // AVX-512 - VPERMIL
6351 //===----------------------------------------------------------------------===//
6413 //===----------------------------------------------------------------------===//
6414 // AVX-512 - VPSHUFD, VPSHUFLW, VPSHUFHW
6415 //===----------------------------------------------------------------------===//
6427 //===----------------------------------------------------------------------===//
6428 // AVX-512 - VPSHUFB
6429 //===----------------------------------------------------------------------===//
6448 //===----------------------------------------------------------------------===//
6450 //===----------------------------------------------------------------------===//
6464 //===----------------------------------------------------------------------===//
6467 //===----------------------------------------------------------------------===//
6538 //===----------------------------------------------------------------------===//
6539 // FMA - Fused Multiply Operations
7163 //===----------------------------------------------------------------------===//
7164 // AVX-512 Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit IFMA
7165 //===----------------------------------------------------------------------===//
7219 //===----------------------------------------------------------------------===//
7220 // AVX-512 Scalar convert from sign integer to float/double
7221 //===----------------------------------------------------------------------===//
7370 //===----------------------------------------------------------------------===//
7371 // AVX-512 Scalar convert from float/double to integer
7372 //===----------------------------------------------------------------------===//
7620 //===----------------------------------------------------------------------===//
7621 // AVX-512 Convert form float to double and back
7622 //===----------------------------------------------------------------------===//
7655 // Scalar Conversion with SAE - suppress all exceptions
7769 //===----------------------------------------------------------------------===//
7770 // AVX-512 Vector convert from signed/unsigned integer to float/double
7772 //===----------------------------------------------------------------------===//
7778 string Alias = "", X86MemOperand MemOp = _Src.MemOp,
7801 OpcodeStr#Alias, "$src", "$src",
7831 // Conversion with SAE - suppress all exceptions
7861 string Alias = "", X86MemOperand MemOp = _Src.MemOp,
7864 Alias, MemOp, MaskRC,
8256 // dest type - 'v4i32x_info'. We also specify the broadcast string explicitly
8321 // dest type - 'v4i32x_info'. We also specify the broadcast string explicitly
8495 // dest type - 'v4i32x_info'. We also specify the broadcast string explicitly
8921 //===----------------------------------------------------------------------===//
8923 //===----------------------------------------------------------------------===//
9691 //-------------------------------------------------
9693 //-------------------------------------------------
10135 // 256-bit patterns
10149 // 512-bit patterns
10171 // 128-bit patterns
10228 // 512-bit patterns
10252 //===----------------------------------------------------------------------===//
10253 // GATHER - SCATTER Operations
10509 //===----------------------------------------------------------------------===//
10510 // AVX-512 - COMPRESS and EXPAND
11040 // We can't really override the 256-bit version so change it back to unset.
11059 return getI8Imm(N->getZExtValue() * 2, SDLoc(N));
11062 return getI8Imm(N->getZExtValue() * 8, SDLoc(N));
11065 return getI8Imm(N->getZExtValue() * 4, SDLoc(N));
11145 // For 512-bit we lower to the widest element type we can. So we only need
11152 // For 128-bit we lower to the widest element type we can. So we only need
11156 // For 256-bit we lower to the widest element type we can. So we only need
11312 //===---------------------------------------------------------------------===//
11313 // Counts number of ones - VPOPCNTD and VPOPCNTQ
11314 //===---------------------------------------------------------------------===//
11323 //===---------------------------------------------------------------------===//
11324 // Replicate Single FP - MOVSHDUP and MOVSLDUP
11325 //===---------------------------------------------------------------------===//
11338 //===----------------------------------------------------------------------===//
11339 // AVX-512 - MOVDDUP
11340 //===----------------------------------------------------------------------===//
11391 //===----------------------------------------------------------------------===//
11392 // AVX-512 - Unpack Instructions
11393 //===----------------------------------------------------------------------===//
11420 //===----------------------------------------------------------------------===//
11421 // AVX-512 - Extract & Insert Integer Instructions
11422 //===----------------------------------------------------------------------===//
11558 let Predicates = [HasBWI], AddedComplexity = -10 in {
11565 //===----------------------------------------------------------------------===//
11566 // VSHUFPS - VSHUFPD Operations
11567 //===----------------------------------------------------------------------===//
11579 //===----------------------------------------------------------------------===//
11580 // AVX-512 - Byte shift Left/Right
11581 //===----------------------------------------------------------------------===//
11662 uint8_t Imm = N->getZExtValue();
11673 uint8_t Imm = N->getZExtValue();
11684 uint8_t Imm = N->getZExtValue();
11695 uint8_t Imm = N->getZExtValue();
11696 // Move bits 1->2, 2->4, 3->6, 4->1, 5->3, 6->5
11708 uint8_t Imm = N->getZExtValue();
11709 // Move bits 1->4, 2->1, 3->5, 4->2, 5->6, 6->3
11981 //===----------------------------------------------------------------------===//
11982 // AVX-512 - FixupImm
11983 //===----------------------------------------------------------------------===//
12228 //===----------------------------------------------------------------------===//
12230 //===----------------------------------------------------------------------===//
12255 //===----------------------------------------------------------------------===//
12256 // PCLMUL instructions - Carry less multiplication
12257 //===----------------------------------------------------------------------===//
12277 //===----------------------------------------------------------------------===//
12279 //===----------------------------------------------------------------------===//
12378 //===----------------------------------------------------------------------===//
12380 //===----------------------------------------------------------------------===//
12457 //===----------------------------------------------------------------------===//
12459 //===----------------------------------------------------------------------===//
12504 //===----------------------------------------------------------------------===//
12506 //===----------------------------------------------------------------------===//
12561 //===----------------------------------------------------------------------===//
12563 //===----------------------------------------------------------------------===//
12592 //===----------------------------------------------------------------------===//
12594 //===----------------------------------------------------------------------===//
12618 //===----------------------------------------------------------------------===//
12620 //===----------------------------------------------------------------------===//
12857 //===----------------------------------------------------------------------===//
12859 //===----------------------------------------------------------------------===//
12897 // AVX 128-bit movw instruction write zeros in the high 128-bit part.
12903 // Use regular 128-bit instructions to match 512-bit scalar_to_vec+zext.
12950 // Convert 16-bit float to i16/u16
12970 // Convert 16-bit float to i16/u16 truncate
13138 // dest type - 'v8f16x_info'. We also specify the broadcast string explicitly