Lines Matching refs:hasSSE1
719 } else if (!Subtarget.useSoftFloat() && Subtarget.hasSSE1() && in X86TargetLowering()
875 if (!Subtarget.useSoftFloat() && Subtarget.is64Bit() && Subtarget.hasSSE1()) { in X86TargetLowering()
1043 if (!Subtarget.useSoftFloat() && Subtarget.hasSSE1()) { in X86TargetLowering()
3256 (VT == MVT::f32 && Subtarget.hasSSE1()) || VT == MVT::f16; in isScalarFPTypeInSSEReg()
3328 if (!Subtarget.hasSSE1() || VT.getSizeInBits() < 128) in hasAndNot()
22842 if ((VT == MVT::f32 && Subtarget.hasSSE1()) || in getSqrtEstimate()
22843 (VT == MVT::v4f32 && Subtarget.hasSSE1() && Reciprocal) || in getSqrtEstimate()
22893 if ((VT == MVT::f32 && Subtarget.hasSSE1()) || in getRecipEstimate()
22894 (VT == MVT::v4f32 && Subtarget.hasSSE1()) || in getRecipEstimate()
24741 assert(Subtarget.hasSSE1() && "Expected SSE"); in LowerStore()
25114 Subtarget.hasSSE1()); in LowerVAARG()
27766 if (Subtarget.hasSSE1()) { in LowerSET_ROUNDING()
27830 if (Subtarget.hasSSE1()) { in LowerGET_FPENV_MEM()
27855 if (Subtarget.hasSSE1()) { in createSetFPEnvNodes()
30483 (Subtarget.hasSSE1() || Subtarget.hasX87())) in shouldExpandAtomicStoreInIR()
30506 (Subtarget.hasSSE1() || Subtarget.hasX87())) in shouldExpandAtomicLoadInIR()
31768 if (Subtarget.hasSSE1()) { in LowerATOMIC_STORE()
33452 if (Subtarget.hasSSE1()) { in ReplaceNodeResults()
33621 assert(Subtarget.hasSSE1() && "Expected SSE"); in ReplaceNodeResults()
38215 if ((MaskVT == MVT::v4f32 && Subtarget.hasSSE1()) || in matchBinaryShuffle()
38427 ((MaskVT.is128BitVector() && Subtarget.hasSSE1()) || in matchBinaryPermuteShuffle()
43479 if (Subtarget.hasSSE1() && !Subtarget.hasSSE2()) { in combineBitcastvxi1()
43703 if (Subtarget.hasSSE1() && !isa<ConstantFPSDNode>(V)) { in createMMXBuildVector()
43727 if (Subtarget.hasSSE1()) { in createMMXBuildVector()
44118 if (!((Subtarget.hasSSE1() && VT == MVT::f32) || in combineBitcast()
45939 (Subtarget.hasSSE1() && VT.getScalarType() == MVT::f32))) { in combineSelect()
47258 (FalseOp.getValueType() == MVT::f32 && !Subtarget.hasSSE1())) || in combineCMov()
49221 if (N00Type != N10Type || !((Subtarget.hasSSE1() && N00Type == MVT::f32) || in convertIntLogicToFPLogic()
49861 if (Subtarget.hasSSE1() && !Subtarget.hasSSE2() && VT == MVT::v4i32) { in combineAnd()
50692 if (Subtarget.hasSSE1() && !Subtarget.hasSSE2() && VT == MVT::v4i32) { in combineOr()
53050 if (Subtarget.hasSSE1() && !Subtarget.hasSSE2() && VT == MVT::v4i32) { in combineXor()
53229 if (!((VT == MVT::f32 && Subtarget.hasSSE1()) || in combineFAndFNotToFAndn()
53231 (VT == MVT::v4f32 && Subtarget.hasSSE1() && !Subtarget.hasSSE2()))) in combineFAndFNotToFAndn()
53333 if (!((Subtarget.hasSSE1() && VT == MVT::f32) || in combineFMinNumFMaxNum()
54476 if (Subtarget.hasSSE1() && !Subtarget.hasSSE2() && VT == MVT::v4i32 && in combineSetCC()
58398 if (((Ty->getPrimitiveSizeInBits() == 128) && Subtarget.hasSSE1()) || in getSingleConstraintMatchWeight()
58440 if (((Ty->getPrimitiveSizeInBits() == 128) && Subtarget.hasSSE1()) || in getSingleConstraintMatchWeight()
58507 if (Subtarget.hasSSE1()) in LowerXConstraint()
58854 if (!Subtarget.hasSSE1()) break; in getRegForInlineAsmConstraint()
58965 if (!Subtarget.hasSSE1()) break; in getRegForInlineAsmConstraint()