Lines Matching refs:VTRUNC
6151 case X86ISD::VTRUNC: { in getFauxShuffleMask()
10135 SDValue Trunc = DAG.getNode(X86ISD::VTRUNC, DL, TruncVT, Src); in getAVX512TruncNode()
15724 V1 = DAG.getNode(X86ISD::VTRUNC, DL, MVT::v16i8, V1); in lowerShuffleAsVTRUNCAndUnpack()
15725 V2 = DAG.getNode(X86ISD::VTRUNC, DL, MVT::v16i8, V2); in lowerShuffleAsVTRUNCAndUnpack()
27248 case X86ISD::VTRUNC: { in LowerINTRINSIC_W_CHAIN()
32768 Results.push_back(DAG.getNode(X86ISD::VTRUNC, dl, WidenVT, In)); in ReplaceNodeResults()
32775 Results.push_back(DAG.getNode(X86ISD::VTRUNC, dl, WidenVT, In)); in ReplaceNodeResults()
32787 Lo = DAG.getNode(X86ISD::VTRUNC, dl, MVT::v16i8, Lo); in ReplaceNodeResults()
32788 Hi = DAG.getNode(X86ISD::VTRUNC, dl, MVT::v16i8, Hi); in ReplaceNodeResults()
33771 NODE_NAME_CASE(VTRUNC) in getTargetNodeName()
37455 case X86ISD::VTRUNC: in computeKnownBitsForTargetNode()
37641 case X86ISD::VTRUNC: { in ComputeNumSignBitsForTargetNode()
38931 IsTRUNCATE ? (unsigned)ISD::TRUNCATE : (unsigned)X86ISD::VTRUNC; in combineX86ShuffleChain()
42270 case X86ISD::VTRUNC: in SimplifyDemandedVectorEltsForTargetNode()
42657 case X86ISD::VTRUNC: { in SimplifyDemandedBitsForTargetNode()
48560 return DAG.getNode(X86ISD::VTRUNC, SDLoc(N), VT, N0.getOperand(0)); in combineVectorPack()
51759 if (Trunc.getOpcode() == X86ISD::VTRUNC) { in combineStore()
57811 case X86ISD::VTRUNC: return combineVTRUNC(N, DAG, DCI); in PerformDAGCombine()