Lines Matching refs:VSELECT
1055 setOperationAction(ISD::VSELECT, MVT::v4f32, Custom); in X86TargetLowering()
1173 setOperationAction(ISD::VSELECT, VT, Custom); in X86TargetLowering()
1180 setOperationAction(ISD::VSELECT, VT, Custom); in X86TargetLowering()
1366 setOperationAction(ISD::VSELECT, MVT::v16i8, Legal); in X86TargetLowering()
1646 setOperationAction(ISD::VSELECT, VT, Custom); in X86TargetLowering()
1664 setOperationAction(ISD::VSELECT, MVT::v32i8, Legal); in X86TargetLowering()
1740 setOperationAction(ISD::VSELECT, VT, Expand); in X86TargetLowering()
2007 setOperationAction(ISD::VSELECT, VT, Custom); in X86TargetLowering()
2136 setOperationAction(ISD::VSELECT, VT, Expand); in X86TargetLowering()
2204 setOperationAction(ISD::VSELECT, VT, Legal); in X86TargetLowering()
2515 ISD::VSELECT, in X86TargetLowering()
6141 case ISD::VSELECT: in getFauxShuffleMask()
17786 return DAG.getBitcast(VT, DAG.getNode(ISD::VSELECT, dl, NVT, Cond, in LowerVSELECT()
17843 return DAG.getNode(ISD::VSELECT, dl, VT, Cond, LHS, RHS); in LowerVSELECT()
17884 SDValue Select = DAG.getNode(ISD::VSELECT, dl, CastVT, Cond, LHS, RHS); in LowerVSELECT()
25370 unsigned OpcodeSelect = ISD::VSELECT; in getVectorMaskingNode()
32043 SDValue Select = DAG.getNode(ISD::VSELECT, dl, VT, Mask, NewLoad, PassThru); in LowerMLOAD()
32369 case ISD::VSELECT: return LowerVSELECT(Op, DAG); in LowerOperation()
38555 if (Root.hasOneUse() && Root->use_begin()->getOpcode() == ISD::VSELECT && in combineX86ShuffleChain()
43380 case ISD::VSELECT: in checkBitcastSrcVectorSize()
43455 case ISD::VSELECT: in signExtendBitcastSrcVector()
44926 if (Vec.getOpcode() == ISD::VSELECT && in scalarizeExtEltFP()
45468 if (N->getOpcode() != ISD::VSELECT) in combineVSelectWithAllOnesOrZeros()
45566 if (Opcode != X86ISD::BLENDV && Opcode != ISD::VSELECT) in narrowVectorSelect()
45673 if ((N->getOpcode() != ISD::VSELECT && in combineVSelectToBLENDV()
45692 if (!TLI.isOperationLegalOrCustom(ISD::VSELECT, VT)) in combineVSelectToBLENDV()
45717 if ((UI->getOpcode() != ISD::VSELECT && in combineVSelectToBLENDV()
45826 if (N->getOpcode() != ISD::VSELECT) in commuteSelect()
45891 (N->getOpcode() == ISD::VSELECT || N->getOpcode() == X86ISD::BLENDV)) { in combineSelect()
45901 if (N->getOpcode() == ISD::VSELECT && CondVT.isVector() && in combineSelect()
46231 if (N->getOpcode() == ISD::VSELECT && Cond.hasOneUse() && in combineSelect()
46243 if (N->getOpcode() == ISD::VSELECT && Cond.getOpcode() == ISD::BITCAST && in combineSelect()
46262 if (N->getOpcode() == ISD::VSELECT) { in combineSelect()
46357 N->getOpcode() == ISD::VSELECT && Cond.getOpcode() == ISD::SETCC && in combineSelect()
48113 if (N0.getOpcode() == ISD::VSELECT && in combineShiftLeft()
48252 if (N0.getOpcode() == ISD::VSELECT && in combineShiftRightLogical()
56630 case ISD::VSELECT: in combineConcatVectorOps()
56939 if (Sel.getOpcode() != ISD::VSELECT || in narrowExtractedVectorSelect()
57151 if (IdxVal == 0 && InOpcode == ISD::VSELECT && in combineEXTRACT_SUBVECTOR()
57763 case ISD::VSELECT: in PerformDAGCombine()