Lines Matching refs:STRICT_FSUB
683 setOperationAction(ISD::STRICT_FSUB, MVT::f16, Promote); in X86TargetLowering()
796 setOperationAction(ISD::STRICT_FSUB, MVT::f32, Legal); in X86TargetLowering()
797 setOperationAction(ISD::STRICT_FSUB, MVT::f64, Legal); in X86TargetLowering()
859 setOperationAction(ISD::STRICT_FSUB , MVT::f80, Legal); in X86TargetLowering()
884 setOperationAction(ISD::STRICT_FSUB, MVT::f128, LibCall); in X86TargetLowering()
1063 setOperationAction(ISD::STRICT_FSUB, MVT::v4f32, Legal); in X86TargetLowering()
1300 setOperationAction(ISD::STRICT_FSUB, MVT::v2f64, Legal); in X86TargetLowering()
1478 setOperationAction(ISD::STRICT_FSUB, MVT::v8f32, Legal); in X86TargetLowering()
1479 setOperationAction(ISD::STRICT_FSUB, MVT::v4f64, Legal); in X86TargetLowering()
1828 setOperationAction(ISD::STRICT_FSUB, MVT::v16f32, Legal); in X86TargetLowering()
1829 setOperationAction(ISD::STRICT_FSUB, MVT::v8f64, Legal); in X86TargetLowering()
2176 setOperationAction(ISD::STRICT_FSUB, VT, Legal); in X86TargetLowering()
19585 SDValue Sub = DAG.getNode(ISD::STRICT_FSUB, dl, {MVT::f64, MVT::Other}, in LowerUINT_TO_FP_i32()
19654 return DAG.getNode(ISD::STRICT_FSUB, DL, {MVT::v2f64, MVT::Other}, in lowerUINT_TO_FP_v2i32()
19724 return DAG.getNode(ISD::STRICT_FSUB, DL, {MVT::v4f64, MVT::Other}, in lowerUINT_TO_FP_vXi32()
19806 SDValue FHigh = DAG.getNode(ISD::STRICT_FSUB, DL, {VecFloatVT, MVT::Other}, in lowerUINT_TO_FP_vXi32()
20107 Value = DAG.getNode(ISD::STRICT_FSUB, DL, { TheVT, MVT::Other}, in FP_TO_INTHelper()
33254 SDValue Sub = DAG.getNode(ISD::STRICT_FSUB, dl, {MVT::v2f64, MVT::Other}, in ReplaceNodeResults()