Lines Matching refs:SExtVT

31162     MVT SExtVT = SrcVT == MVT::v16i1 ? MVT::v16i8 : MVT::v32i8;  in LowerBITCAST()  local
31164 SDValue V = DAG.getSExtOrTrunc(Src, DL, SExtVT); in LowerBITCAST()
43439 static SDValue signExtendBitcastSrcVector(SelectionDAG &DAG, EVT SExtVT, in signExtendBitcastSrcVector() argument
43446 return DAG.getNode(ISD::SIGN_EXTEND, DL, SExtVT, Src); in signExtendBitcastSrcVector()
43451 Src.getOpcode(), DL, SExtVT, in signExtendBitcastSrcVector()
43452 signExtendBitcastSrcVector(DAG, SExtVT, Src.getOperand(0), DL), in signExtendBitcastSrcVector()
43453 signExtendBitcastSrcVector(DAG, SExtVT, Src.getOperand(1), DL)); in signExtendBitcastSrcVector()
43457 DL, SExtVT, Src.getOperand(0), in signExtendBitcastSrcVector()
43458 signExtendBitcastSrcVector(DAG, SExtVT, Src.getOperand(1), DL), in signExtendBitcastSrcVector()
43459 signExtendBitcastSrcVector(DAG, SExtVT, Src.getOperand(2), DL)); in signExtendBitcastSrcVector()
43541 MVT SExtVT; in combineBitcastvxi1() local
43547 SExtVT = MVT::v2i64; in combineBitcastvxi1()
43550 SExtVT = MVT::v4i32; in combineBitcastvxi1()
43555 SExtVT = MVT::v4i64; in combineBitcastvxi1()
43560 SExtVT = MVT::v8i16; in combineBitcastvxi1()
43568 SExtVT = MVT::v8i32; in combineBitcastvxi1()
43573 SExtVT = MVT::v16i8; in combineBitcastvxi1()
43580 SExtVT = MVT::v32i8; in combineBitcastvxi1()
43588 SExtVT = MVT::v64i8; in combineBitcastvxi1()
43593 SExtVT = MVT::v64i8; in combineBitcastvxi1()
43599 SDValue V = PropagateSExt ? signExtendBitcastSrcVector(DAG, SExtVT, Src, DL) in combineBitcastvxi1()
43600 : DAG.getNode(ISD::SIGN_EXTEND, DL, SExtVT, Src); in combineBitcastvxi1()
43602 if (SExtVT == MVT::v16i8 || SExtVT == MVT::v32i8 || SExtVT == MVT::v64i8) { in combineBitcastvxi1()
43605 if (SExtVT == MVT::v8i16) { in combineBitcastvxi1()