2696   case X86ISD::PSHUFHW:  in isTargetShuffle()
5353   case X86ISD::PSHUFHW:  in getTargetShuffleMask()
11959     unsigned OddEvenOp = (Offset & 1) ? X86ISD::PSHUFLW : X86ISD::PSHUFHW;  in lowerShuffleAsSpecificZeroOrAnyExtend()
13331     return DAG.getNode(X86ISD::PSHUFHW, DL, VT, V,  in lowerV8I16GeneralSingleInputShuffle()
13404         return ShuffleDWordPairs(PSHUFHalfMask, PSHUFDMask, X86ISD::PSHUFHW);  in lowerV8I16GeneralSingleInputShuffle()
13508               FixIdx < 4 ? X86ISD::PSHUFLW : X86ISD::PSHUFHW, DL,  in lowerV8I16GeneralSingleInputShuffle()
13772     V = DAG.getNode(X86ISD::PSHUFHW, DL, VT, V,  in lowerV8I16GeneralSingleInputShuffle()
13797     V = DAG.getNode(X86ISD::PSHUFHW, DL, VT, V,  in lowerV8I16GeneralSingleInputShuffle()
33843   NODE_NAME_CASE(PSHUFHW)  in getTargetNodeName()
38077             Shuffle = X86ISD::PSHUFHW;  in matchUnaryPermuteShuffle()
40177   case X86ISD::PSHUFHW:  in getPSHUFShuffleMask()
40228     case X86ISD::PSHUFHW:  in combineRedundantDWordShuffle()
40248           V.getOpcode() == X86ISD::UNPCKL ? X86ISD::PSHUFLW : X86ISD::PSHUFHW;  in combineRedundantDWordShuffle()
40260         case X86ISD::PSHUFHW:  in combineRedundantDWordShuffle()
40308     case X86ISD::PSHUFHW:  in combineRedundantDWordShuffle()
40525   case X86ISD::PSHUFHW:  in canonicalizeShuffleWithOp()
41222   case X86ISD::PSHUFHW: {  in combineTargetShuffle()
41430   case X86ISD::PSHUFHW:  in combineTargetShuffle()
41453          V.getOpcode() == X86ISD::PSHUFHW) &&  in combineTargetShuffle()
42504     case X86ISD::PSHUFHW:  in SimplifyDemandedVectorEltsForTargetNode()
56263     case X86ISD::PSHUFHW:  in combineConcatVectorOps()
57876   case X86ISD::PSHUFHW:  in PerformDAGCombine()