2695   case X86ISD::PSHUFD:  in isTargetShuffle()
5346   case X86ISD::PSHUFD:  in getTargetShuffleMask()
11948         VT, DAG.getNode(X86ISD::PSHUFD, DL, MVT::v4i32,  in lowerShuffleAsSpecificZeroOrAnyExtend()
11955     InputV = DAG.getNode(X86ISD::PSHUFD, DL, MVT::v4i32,  in lowerShuffleAsSpecificZeroOrAnyExtend()
12898         DAG.getNode(X86ISD::PSHUFD, DL, MVT::v4i32, V1,  in lowerV2I64Shuffle()
13219     return DAG.getNode(X86ISD::PSHUFD, DL, MVT::v4i32, V1,  in lowerV4I32Shuffle()
13360     V = DAG.getNode(X86ISD::PSHUFD, DL, PSHUFDVT, V,  in lowerV8I16GeneralSingleInputShuffle()
13535         DAG.getNode(X86ISD::PSHUFD, DL, PSHUFDVT, DAG.getBitcast(PSHUFDVT, V),  in lowerV8I16GeneralSingleInputShuffle()
13777         DAG.getNode(X86ISD::PSHUFD, DL, PSHUFDVT, DAG.getBitcast(PSHUFDVT, V),  in lowerV8I16GeneralSingleInputShuffle()
15985           DAG.getNode(X86ISD::PSHUFD, DL, MVT::v8i32,  in lowerV4I64Shuffle()
16245       return DAG.getNode(X86ISD::PSHUFD, DL, MVT::v8i32, V1,  in lowerV8I32Shuffle()
16893           DAG.getNode(X86ISD::PSHUFD, DL, MVT::v16i32,  in lowerV8I64Shuffle()
16979       return DAG.getNode(X86ISD::PSHUFD, DL, MVT::v16i32, V1,  in lowerV16I32Shuffle()
33842   NODE_NAME_CASE(PSHUFD)  in getTargetNodeName()
38042           Shuffle = (AllowIntDomain ? X86ISD::PSHUFD : X86ISD::VPERMILPI);  in matchUnaryPermuteShuffle()
40172   case X86ISD::PSHUFD:  in getPSHUFShuffleMask()
40196   assert(N.getOpcode() == X86ISD::PSHUFD &&  in combineRedundantDWordShuffle()
40214     case X86ISD::PSHUFD:  in combineRedundantDWordShuffle()
40306     case X86ISD::PSHUFD:  in combineRedundantDWordShuffle()
40524   case X86ISD::PSHUFD:  in canonicalizeShuffleWithOp()
40676   case X86ISD::PSHUFD:  in canonicalizeLaneShuffleWithRepeatedOps()
41220   case X86ISD::PSHUFD:  in combineTargetShuffle()
41443       V = DAG.getNode(X86ISD::PSHUFD, DL, DVT, V,  in combineTargetShuffle()
41457       if (D.getOpcode() == X86ISD::PSHUFD) {  in combineTargetShuffle()
41484   case X86ISD::PSHUFD:  in combineTargetShuffle()
42502     case X86ISD::PSHUFD:  in SimplifyDemandedVectorEltsForTargetNode()
43289   case X86ISD::PSHUFD:  in isGuaranteedNotToBeUndefOrPoisonForTargetNode()
43332   case X86ISD::PSHUFD:  in canCreateUndefOrPoisonForTargetNode()
48638             DAG.getNode(X86ISD::PSHUFD, DL, ShufVT, Res,  in combineVectorHADDSUB()
48641             DAG.getNode(X86ISD::PSHUFD, DL, ShufVT, Res,  in combineVectorHADDSUB()
48768       N0.getOpcode() == X86ISD::PSHUFD &&  in combineVectorShiftImm()
48778       Src = DAG.getNode(X86ISD::PSHUFD, DL, VT, Src,  in combineVectorShiftImm()
56219                                               : X86ISD::PSHUFD,  in combineConcatVectorOps()
56265     case X86ISD::PSHUFD:  in combineConcatVectorOps()
57875   case X86ISD::PSHUFD:  in PerformDAGCombine()