4650       return DAG.getNode(X86ISD::PACKUS, dl, VT, LHS, RHS);  in getPack()
4668     return DAG.getNode(X86ISD::PACKUS, dl, VT, LHS, RHS);  in getPack()
6084   case X86ISD::PACKUS: {  in getFauxShuffleMask()
7726   case X86ISD::PACKUS:  in isHorizOp()
9588   case X86ISD::PACKUS:  in IsElementEquivalent()
10391         PackOpcode = X86ISD::PACKUS;  in matchShuffleWithPACK()
14004       PackOpc = X86ISD::PACKUS;  in lowerV8I16Shuffle()
14016       PackOpc = X86ISD::PACKUS;  in lowerV8I16Shuffle()
14048     return DAG.getNode(HasSSE41 ? X86ISD::PACKUS : X86ISD::PACKSS, DL,  in lowerV8I16Shuffle()
14421     SDValue Result = DAG.getNode(X86ISD::PACKUS, DL, MVT::v16i8, V1,  in lowerV16I8Shuffle()
14425       Result = DAG.getNode(X86ISD::PACKUS, DL, MVT::v16i8, Result, Result);  in lowerV16I8Shuffle()
14439     return DAG.getNode(X86ISD::PACKUS, DL, MVT::v16i8, V1,  in lowerV16I8Shuffle()
14494   return DAG.getNode(X86ISD::PACKUS, DL, MVT::v16i8, LoV, HiV);  in lowerV16I8Shuffle()
20303   assert((Opcode == X86ISD::PACKSS || Opcode == X86ISD::PACKUS) &&  in truncateVectorWithPACK()
20426   return truncateVectorWithPACK(X86ISD::PACKUS, DstVT, In, DL, DAG, Subtarget);  in truncateVectorWithPACKUS()
20492     PackOpcode = X86ISD::PACKUS;  in matchTruncateWithPACK()
29456       return DAG.getNode(X86ISD::PACKUS, dl, VT, Lo, Hi);  in convertShiftLeftToScale()
29744     return DAG.getNode(X86ISD::PACKUS, dl, VT, LoR, HiR);  in LowerShift()
29852       return DAG.getNode(X86ISD::PACKUS, dl, VT, RLo, RHi);  in LowerShift()
29871     return DAG.getNode(X86ISD::PACKUS, dl, VT, Lo, Hi);  in LowerShift()
31251     V = DAG.getNode(X86ISD::PACKUS, DL, ByteVecVT,  in LowerHorizontalByteSum()
33835   NODE_NAME_CASE(PACKUS)  in getTargetNodeName()
37274   case X86ISD::PACKUS: {  in computeKnownBitsForTargetNode()
38195       Shuffle = X86ISD::PACKUS;  in matchBinaryShuffle()
38202       Shuffle = X86ISD::PACKUS;  in matchBinaryShuffle()
38951                          Root.getOpcode() == X86ISD::PACKUS))  in combineX86ShuffleChain()
39390   bool isPack = (Opcode0 == X86ISD::PACKSS || Opcode0 == X86ISD::PACKUS);  in canonicalizeShuffleMaskWithHorizOp()
42199   case X86ISD::PACKUS: {  in SimplifyDemandedVectorEltsForTargetNode()
42515     case X86ISD::PACKUS:  in SimplifyDemandedVectorEltsForTargetNode()
45109       Rdx = DAG.getNode(X86ISD::PACKUS, DL, MVT::v16i8, Rdx,  in combineArithReduction()
48461   assert((X86ISD::PACKSS == Opcode || X86ISD::PACKUS == Opcode) &&  in combineVectorPack()
51055       SDValue Mid = truncateVectorWithPACK(X86ISD::PACKUS, MVT::v16i16, USatVal,  in combineTruncateWithSat()
51085         SDValue V = truncateVectorWithPACK(X86ISD::PACKUS, VT, Mid, DL, DAG,  in combineTruncateWithSat()
51090         return truncateVectorWithPACK(X86ISD::PACKUS, VT, USatVal, DL, DAG,  in combineTruncateWithSat()
54172   if (N0.getOpcode() == X86ISD::PACKUS && N0.getValueSizeInBits() == 128 &&  in combineZext()
56589     case X86ISD::PACKUS:  in combineConcatVectorOps()
57845   case X86ISD::PACKUS:      return combineVectorPack(N, DAG, DCI, Subtarget);  in PerformDAGCombine()