Lines Matching refs:Ld
2648 auto *Ld = cast<LoadSDNode>(Op.getNode()); in mayFoldLoad() local
2650 Ld->getValueSizeInBits(0) == 128 && Ld->getAlign() < Align(16)) in mayFoldLoad()
2668 auto *Ld = cast<LoadSDNode>(Op.getNode()); in mayFoldLoadIntoBroadcastFromMem() local
2669 return !Ld->isVolatile() || in mayFoldLoadIntoBroadcastFromMem()
2670 Ld->getValueSizeInBits(0) == EltVT.getScalarSizeInBits(); in mayFoldLoadIntoBroadcastFromMem()
6849 static bool findEltLoadSrc(SDValue Elt, LoadSDNode *&Ld, int64_t &ByteOffset) { in findEltLoadSrc() argument
6854 Ld = BaseLd; in findEltLoadSrc()
6863 return findEltLoadSrc(Elt.getOperand(0), Ld, ByteOffset); in findEltLoadSrc()
6867 if ((Amt % 8) == 0 && findEltLoadSrc(Elt.getOperand(0), Ld, ByteOffset)) { in findEltLoadSrc()
6879 findEltLoadSrc(Src, Ld, ByteOffset)) { in findEltLoadSrc()
6975 LoadSDNode *Ld = Loads[EltIdx]; in EltsFromConsecutiveLoads() local
6980 Loads[BaseIdx] == Ld && ByteOffsets[BaseIdx] == 0); in EltsFromConsecutiveLoads()
6982 return DAG.areNonVolatileConsecutiveLoads(Ld, Base, BaseSizeInBytes, in EltsFromConsecutiveLoads()
7295 SDValue Ld; in lowerBuildVectorAsBroadcast() local
7301 Ld = Sequence[0]; in lowerBuildVectorAsBroadcast()
7342 if (!Ld || (NumElts - NumUndefElts) <= 1) { in lowerBuildVectorAsBroadcast()
7397 if (!Ld || NumElts - NumUndefElts != 1) in lowerBuildVectorAsBroadcast()
7399 unsigned ScalarSize = Ld.getValueSizeInBits(); in lowerBuildVectorAsBroadcast()
7405 (Ld.getOpcode() == ISD::Constant || Ld.getOpcode() == ISD::ConstantFP); in lowerBuildVectorAsBroadcast()
7406 bool IsLoad = ISD::isNormalLoad(Ld.getNode()); in lowerBuildVectorAsBroadcast()
7413 if (!ConstSplatVal && !IsLoad && !BVOp->isOnlyUserOf(Ld.getNode())) in lowerBuildVectorAsBroadcast()
7416 unsigned ScalarSize = Ld.getValueSizeInBits(); in lowerBuildVectorAsBroadcast()
7433 EVT CVT = Ld.getValueType(); in lowerBuildVectorAsBroadcast()
7445 if (ConstantSDNode *CI = dyn_cast<ConstantSDNode>(Ld)) in lowerBuildVectorAsBroadcast()
7447 else if (ConstantFPSDNode *CF = dyn_cast<ConstantFPSDNode>(Ld)) in lowerBuildVectorAsBroadcast()
7468 return DAG.getNode(X86ISD::VBROADCAST, dl, VT, Ld); in lowerBuildVectorAsBroadcast()
7475 if (!Ld->hasNUsesOfValue(NumElts - NumUndefElts, 0)) in lowerBuildVectorAsBroadcast()
7480 auto *LN = cast<LoadSDNode>(Ld); in lowerBuildVectorAsBroadcast()
7492 if (Subtarget.hasInt256() && Ld.getValueType().isInteger() && in lowerBuildVectorAsBroadcast()
7494 auto *LN = cast<LoadSDNode>(Ld); in lowerBuildVectorAsBroadcast()
7505 return DAG.getNode(X86ISD::VBROADCAST, dl, VT, Ld); in lowerBuildVectorAsBroadcast()
8940 SDValue Ld = DAG.getLoad(VT, dl, DAG.getEntryNode(), LegalDAGConstVec, MPI); in LowerBUILD_VECTOR() local
8944 return DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Ld, VarElt, InsIndex); in LowerBUILD_VECTOR()
8955 return DAG.getVectorShuffle(VT, dl, Ld, S2V, ShuffleMask); in LowerBUILD_VECTOR()
12589 LoadSDNode *Ld = cast<LoadSDNode>(V); in lowerShuffleAsBroadcast() local
12590 SDValue BaseAddr = Ld->getOperand(1); in lowerShuffleAsBroadcast()
12602 SDValue Ops[] = {Ld->getChain(), NewAddr}; in lowerShuffleAsBroadcast()
12606 Ld->getMemOperand(), Offset, SVT.getStoreSize())); in lowerShuffleAsBroadcast()
12607 DAG.makeEquivalentMemoryOrdering(Ld, V); in lowerShuffleAsBroadcast()
12611 V = DAG.getLoad(SVT, DL, Ld->getChain(), NewAddr, in lowerShuffleAsBroadcast()
12613 Ld->getMemOperand(), Offset, SVT.getStoreSize())); in lowerShuffleAsBroadcast()
12614 DAG.makeEquivalentMemoryOrdering(Ld, V); in lowerShuffleAsBroadcast()
14953 auto *Ld = cast<LoadSDNode>(peekThroughOneUseBitcasts(V1)); in lowerV2X128Shuffle() local
14955 VT, MemVT, Ld, Ofs, DAG)) in lowerV2X128Shuffle()
24762 LoadSDNode *Ld = cast<LoadSDNode>(Op.getNode()); in LowerLoad() local
24763 SDLoc dl(Ld); in LowerLoad()
24767 assert(EVT(RegVT) == Ld->getMemoryVT() && "Expected non-extending load"); in LowerLoad()
24772 SDValue NewLd = DAG.getLoad(MVT::i8, dl, Ld->getChain(), Ld->getBasePtr(), in LowerLoad()
24773 Ld->getPointerInfo(), Ld->getOriginalAlign(), in LowerLoad()
24774 Ld->getMemOperand()->getFlags()); in LowerLoad()
33439 SDValue Ld = DAG.getLoad(MVT::v2i64, dl, Node->getChain(), in ReplaceNodeResults() local
33441 SDValue ResL = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i64, Ld, in ReplaceNodeResults()
33443 SDValue ResH = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i64, Ld, in ReplaceNodeResults()
33447 Results.push_back(Ld.getValue(1)); in ReplaceNodeResults()
33458 SDValue Ld = DAG.getMemIntrinsicNode(X86ISD::VZEXT_LOAD, dl, Tys, Ops, in ReplaceNodeResults() local
33461 SDValue Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i64, Ld, in ReplaceNodeResults()
33464 Results.push_back(Ld.getValue(1)); in ReplaceNodeResults()
33470 SDValue Res = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v2f32, Ld, in ReplaceNodeResults()
33474 Results.push_back(Ld.getValue(1)); in ReplaceNodeResults()
33606 auto *Ld = cast<LoadSDNode>(N); in ReplaceNodeResults() local
33609 SDValue Res = DAG.getLoad(LdVT, dl, Ld->getChain(), Ld->getBasePtr(), in ReplaceNodeResults()
33610 Ld->getPointerInfo(), Ld->getOriginalAlign(), in ReplaceNodeResults()
33611 Ld->getMemOperand()->getFlags()); in ReplaceNodeResults()
33623 SDValue Ops[] = {Ld->getChain(), Ld->getBasePtr()}; in ReplaceNodeResults()
33625 MVT::i64, Ld->getMemOperand()); in ReplaceNodeResults()
42427 SDValue Ld = in SimplifyDemandedVectorEltsForTargetNode() local
42431 Ld.getValue(1)); in SimplifyDemandedVectorEltsForTargetNode()
42432 return TLO.CombineTo(Op, insertSubVector(TLO.DAG.getUNDEF(VT), Ld, 0, in SimplifyDemandedVectorEltsForTargetNode()
49450 static SDValue getIndexFromUnindexedLoad(LoadSDNode *Ld) { in getIndexFromUnindexedLoad() argument
49451 if (Ld->isIndexed()) in getIndexFromUnindexedLoad()
49454 SDValue Base = Ld->getBasePtr(); in getIndexFromUnindexedLoad()
49495 LoadSDNode *Ld = dyn_cast<LoadSDNode>(N.getNode()); in combineAndLoadToBZHI() local
49498 if (!Ld) in combineAndLoadToBZHI()
49501 const Value *MemOp = Ld->getMemOperand()->getValue(); in combineAndLoadToBZHI()
49541 SDValue Index = getIndexFromUnindexedLoad(Ld); in combineAndLoadToBZHI()
51141 auto *Ld = cast<LoadSDNode>(N); in combineConstantPoolLoads() local
51142 EVT RegVT = Ld->getValueType(0); in combineConstantPoolLoads()
51143 SDValue Ptr = Ld->getBasePtr(); in combineConstantPoolLoads()
51144 SDValue Chain = Ld->getChain(); in combineConstantPoolLoads()
51145 ISD::LoadExtType Ext = Ld->getExtensionType(); in combineConstantPoolLoads()
51147 if (Ext != ISD::NON_EXTLOAD || !Subtarget.hasAVX() || !Ld->isSimple()) in combineConstantPoolLoads()
51215 auto *Ld = cast<LoadSDNode>(N); in combineLoad() local
51216 EVT RegVT = Ld->getValueType(0); in combineLoad()
51217 EVT MemVT = Ld->getMemoryVT(); in combineLoad()
51218 SDLoc dl(Ld); in combineLoad()
51224 ISD::LoadExtType Ext = Ld->getExtensionType(); in combineLoad()
51228 ((Ld->isNonTemporal() && !Subtarget.hasInt256() && in combineLoad()
51229 Ld->getAlign() >= Align(16)) || in combineLoad()
51231 *Ld->getMemOperand(), &Fast) && in combineLoad()
51238 SDValue Ptr1 = Ld->getBasePtr(); in combineLoad()
51244 DAG.getLoad(HalfVT, dl, Ld->getChain(), Ptr1, Ld->getPointerInfo(), in combineLoad()
51245 Ld->getOriginalAlign(), in combineLoad()
51246 Ld->getMemOperand()->getFlags()); in combineLoad()
51247 SDValue Load2 = DAG.getLoad(HalfVT, dl, Ld->getChain(), Ptr2, in combineLoad()
51248 Ld->getPointerInfo().getWithOffset(HalfOffset), in combineLoad()
51249 Ld->getOriginalAlign(), in combineLoad()
51250 Ld->getMemOperand()->getFlags()); in combineLoad()
51265 SDValue IntLoad = DAG.getLoad(IntVT, dl, Ld->getChain(), Ld->getBasePtr(), in combineLoad()
51266 Ld->getPointerInfo(), in combineLoad()
51267 Ld->getOriginalAlign(), in combineLoad()
51268 Ld->getMemOperand()->getFlags()); in combineLoad()
51276 if (Ext == ISD::NON_EXTLOAD && Subtarget.hasAVX() && Ld->isSimple() && in combineLoad()
51278 SDValue Ptr = Ld->getBasePtr(); in combineLoad()
51279 SDValue Chain = Ld->getChain(); in combineLoad()
51297 if (SDValue V = combineConstantPoolLoads(Ld, dl, DAG, DCI, Subtarget)) in combineLoad()
51301 unsigned AddrSpace = Ld->getAddressSpace(); in combineLoad()
51305 if (PtrVT != Ld->getBasePtr().getSimpleValueType()) { in combineLoad()
51307 DAG.getAddrSpaceCast(dl, PtrVT, Ld->getBasePtr(), AddrSpace, 0); in combineLoad()
51308 return DAG.getExtLoad(Ext, dl, RegVT, Ld->getChain(), Cast, in combineLoad()
51309 Ld->getPointerInfo(), MemVT, Ld->getOriginalAlign(), in combineLoad()
51310 Ld->getMemOperand()->getFlags()); in combineLoad()
51829 auto *Ld = cast<LoadSDNode>(St->getValue()); in combineStore() local
51831 if (!ISD::isNormalLoad(Ld)) in combineStore()
51835 if (!Ld->hasNUsesOfValue(1, 0)) in combineStore()
51838 SDLoc LdDL(Ld); in combineStore()
51841 SDValue NewLd = DAG.getLoad(MVT::f64, LdDL, Ld->getChain(), in combineStore()
51842 Ld->getBasePtr(), Ld->getMemOperand()); in combineStore()
51845 DAG.makeEquivalentMemoryOrdering(Ld, NewLd); in combineStore()
55055 LoadSDNode *Ld = cast<LoadSDNode>(Op0.getNode()); in combineSIntToFP() local
55066 if (Ld->isSimple() && !VT.isVector() && ISD::isNormalLoad(Op0.getNode()) && in combineSIntToFP()
55070 VT, InVT, SDLoc(N), Ld->getChain(), Ld->getBasePtr(), in combineSIntToFP()
55071 Ld->getPointerInfo(), Ld->getOriginalAlign(), DAG); in combineSIntToFP()
56671 if (SDValue Ld = in combineConcatVectorOps() local
56673 return Ld; in combineConcatVectorOps()
56697 SDValue Ld = DAG.getLoad(VT, DL, DAG.getEntryNode(), CV, MPI); in combineConcatVectorOps() local
56698 SDValue Sub = extractSubVector(Ld, 0, DAG, DL, Op0.getValueSizeInBits()); in combineConcatVectorOps()
56700 return Ld; in combineConcatVectorOps()
57233 if (auto *Ld = dyn_cast<LoadSDNode>(Op)) in combineScalarToVector() local
57234 if (Ld->getExtensionType() == Ext && in combineScalarToVector()
57235 Ld->getMemoryVT().getScalarSizeInBits() <= 32) in combineScalarToVector()
57395 auto *Ld = cast<LoadSDNode>(In); in combineEXTEND_VECTOR_INREG() local
57396 if (Ld->isSimple()) { in combineEXTEND_VECTOR_INREG()
57404 Ext, DL, VT, Ld->getChain(), Ld->getBasePtr(), Ld->getPointerInfo(), in combineEXTEND_VECTOR_INREG()
57405 MemVT, Ld->getOriginalAlign(), Ld->getMemOperand()->getFlags()); in combineEXTEND_VECTOR_INREG()
57406 DAG.ReplaceAllUsesOfValueWith(SDValue(Ld, 1), Load.getValue(1)); in combineEXTEND_VECTOR_INREG()
58060 auto *Ld = cast<LoadSDNode>(Load); in IsDesirableToPromoteOp() local
58062 return Ld->getBasePtr() == St->getBasePtr(); in IsDesirableToPromoteOp()
58073 auto *Ld = cast<AtomicSDNode>(Load); in IsDesirableToPromoteOp() local
58075 return Ld->getBasePtr() == St->getBasePtr(); in IsDesirableToPromoteOp()