4372     Vec = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, Vec, ShiftBits);  in insert1BitVector()
4386     SubVec = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, SubVec,  in insert1BitVector()
4396       SubVec = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, SubVec,  in insert1BitVector()
4402       SubVec = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, SubVec,  in insert1BitVector()
4413     SubVec = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, SubVec,  in insert1BitVector()
4428       Vec = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, Vec, ShiftBits);  in insert1BitVector()
4452     SubVec = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, SubVec,  in insert1BitVector()
4463   SubVec = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, SubVec,  in insert1BitVector()
4470   SDValue Low = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, Vec,  in insert1BitVector()
4479   High = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, High,  in insert1BitVector()
9316     Op = DAG.getNode(X86ISD::KSHIFTL, dl, ShiftVT, Op,  in LowerCONCAT_VECTORSvXi1()
17337         Opcode = Left ? X86ISD::KSHIFTL : X86ISD::KSHIFTR;  in match1BitShuffleAsKSHIFT()
17410         Res = DAG.getNode(X86ISD::KSHIFTL, DL, WideVT, Res,  in lower1BitShuffle()
33832   NODE_NAME_CASE(KSHIFTL)  in getTargetNodeName()
42046   case X86ISD::KSHIFTL: {  in SimplifyDemandedVectorEltsForTargetNode()
42061         unsigned NewOpc = X86ISD::KSHIFTL;  in SimplifyDemandedVectorEltsForTargetNode()
42097     if (Src.getOpcode() == X86ISD::KSHIFTL) {  in SimplifyDemandedVectorEltsForTargetNode()
42104           NewOpc = X86ISD::KSHIFTL;  in SimplifyDemandedVectorEltsForTargetNode()
43847             X86ISD::KSHIFTL, DL, VT, N0,  in combineBitcastToBoolVector()
50778   if (N0.getOpcode() == X86ISD::KSHIFTL || N1.getOpcode() == X86ISD::KSHIFTL) {  in combineOr()
50782     if (NumElts >= 16 && N1.getOpcode() == X86ISD::KSHIFTL &&  in combineOr()
50790     if (NumElts >= 16 && N0.getOpcode() == X86ISD::KSHIFTL &&  in combineOr()
57924   case X86ISD::KSHIFTL:  in PerformDAGCombine()