Lines Matching refs:FMAX
21358 X86ISD::FMAX, dl, SrcVT, MinFloatNode, Src); in LowerFP_TO_INT_SAT()
21372 X86ISD::FMAX, dl, SrcVT, Src, MinFloatNode); in LowerFP_TO_INT_SAT()
28288 MinMaxOp = X86ISD::FMAX; in LowerFMINIMUM_FMAXIMUM()
28364 SDValue Imm = DAG.getTargetConstant(MinMaxOp == X86ISD::FMAX ? 0b11 : 0b101, in LowerFMINIMUM_FMAXIMUM()
28394 if (MinMaxOp == X86ISD::FMAX) { in LowerFMINIMUM_FMAXIMUM()
32675 case X86ISD::FMAX: { in ReplaceNodeResults()
33722 NODE_NAME_CASE(FMAX) in getTargetNodeName()
34155 case X86ISD::FMAX: in isBinOp()
42524 case X86ISD::FMAX: in SimplifyDemandedVectorEltsForTargetNode()
44960 case X86ISD::FMAX: in scalarizeExtEltFP()
45986 Opcode = X86ISD::FMAX; in combineSelect()
45999 Opcode = X86ISD::FMAX; in combineSelect()
46009 Opcode = X86ISD::FMAX; in combineSelect()
46051 Opcode = X86ISD::FMAX; in combineSelect()
46064 Opcode = X86ISD::FMAX; in combineSelect()
46074 Opcode = X86ISD::FMAX; in combineSelect()
53305 assert(N->getOpcode() == X86ISD::FMIN || N->getOpcode() == X86ISD::FMAX); in combineFMinFMax()
53318 case X86ISD::FMAX: NewOp = X86ISD::FMAXC; break; in combineFMinFMax()
53342 auto MinMaxOp = N->getOpcode() == ISD::FMAXNUM ? X86ISD::FMAX : X86ISD::FMIN; in combineFMinNumFMaxNum()
57818 case X86ISD::FMAX: return combineFMinFMax(N, DAG); in PerformDAGCombine()