7728   case X86ISD::FHSUB:  in isHorizOp()
8141         case ISD::FSUB: HOpcode = X86ISD::FHSUB; break;  in isHopBuildVector()
8328       X86Opcode = X86ISD::FHSUB;  in LowerToHorizontalOp()
9586   case X86ISD::FHSUB:  in IsElementEquivalent()
21758   case ISD::FSUB: HOpcode = X86ISD::FHSUB; break;  in lowerAddSubToHorizontalOp()
33720   NODE_NAME_CASE(FHSUB)  in getTargetNodeName()
39389                   Opcode0 == X86ISD::FHSUB || Opcode0 == X86ISD::HSUB);  in canonicalizeShuffleMaskWithHorizOp()
42236   case X86ISD::FHSUB: {  in SimplifyDemandedVectorEltsForTargetNode()
42532     case X86ISD::FHSUB: {  in SimplifyDemandedVectorEltsForTargetNode()
48612           X86ISD::HSUB == N->getOpcode() || X86ISD::FHSUB == N->getOpcode()) &&  in combineVectorHADDSUB()
52118       auto HorizOpcode = IsAdd ? X86ISD::FHADD : X86ISD::FHSUB;  in combineToHorizontalAddSub()
56580     case X86ISD::FHSUB:  in combineConcatVectorOps()
57849   case X86ISD::FHSUB:       return combineVectorHADDSUB(N, DAG, DCI, Subtarget);  in PerformDAGCombine()