Lines Matching refs:CC1
23319 unsigned CC0, CC1; in LowerVSETCC() local
23323 CC1 = 0; // EQ in LowerVSETCC()
23328 CC1 = 4; // NEQ in LowerVSETCC()
23339 {Chain, Op0, Op1, DAG.getTargetConstant(CC1, dl, MVT::i8)}); in LowerVSETCC()
23346 Opc, dl, VT, Op0, Op1, DAG.getTargetConstant(CC1, dl, MVT::i8)); in LowerVSETCC()
46718 X86::CondCode &CC1, SDValue &Flags, in checkBoolTestAndOrSetCCCombine() argument
46750 CC1 = (X86::CondCode)SetCC1->getConstantOperandVal(0); in checkBoolTestAndOrSetCCCombine()
47433 X86::CondCode CC0, CC1; in combineCMov() local
47435 if (checkBoolTestAndOrSetCCCombine(Cond, CC0, CC1, Flags, isAndSetCC)) { in combineCMov()
47439 CC1 = X86::GetOppositeBranchCondition(CC1); in combineCMov()
47445 SDValue Ops[] = {LCMOV, TrueOp, DAG.getTargetConstant(CC1, DL, MVT::i8), in combineCMov()
49237 ISD::CondCode CC1 = cast<CondCodeSDNode>(N1.getOperand(2))->get(); in convertIntLogicToFPLogic() local
49242 !(cheapX86FSETCC_SSE(CC0) && cheapX86FSETCC_SSE(CC1))) in convertIntLogicToFPLogic()
49260 SDValue Setcc1 = DAG.getSetCC(DL, BoolVecVT, Vec10, Vec11, CC1); in convertIntLogicToFPLogic()
49829 X86::CondCode CC1 = in combineAndOrForCcmpCtest() local
49831 X86::CondCode OppositeCC1 = X86::GetOppositeBranchCondition(CC1); in combineAndOrForCcmpCtest()
49832 X86::CondCode CFlagsCC = IsOR ? CC1 : OppositeCC1; in combineAndOrForCcmpCtest()