6142   case X86ISD::BLENDV: {  in getFauxShuffleMask()
6144     if (createShuffleMaskFromVSELECT(Mask, Cond, Opcode == X86ISD::BLENDV)) {  in getFauxShuffleMask()
20846     return DAG.getNode(X86ISD::BLENDV, dl, VT, Small, Overflow, Small);  in expandFP_TO_UINT_SSE()
25821     case BLENDV: {  in LowerINTRINSIC_WO_CHAIN()
28225     return DAG.getNode(X86ISD::BLENDV, DL, VT, Src, Neg, Src);  in LowerABS()
29771                               DAG.getNode(X86ISD::BLENDV, dl, VT, Sel, V0, V1));  in LowerShift()
29889             VT, DAG.getNode(X86ISD::BLENDV, dl, ExtVT, Sel, V0, V1));  in LowerShift()
30345                               DAG.getNode(X86ISD::BLENDV, DL, VT, Sel, V0, V1));  in LowerRotate()
33716   NODE_NAME_CASE(BLENDV)  in getTargetNodeName()
42293   case X86ISD::BLENDV: {  in SimplifyDemandedVectorEltsForTargetNode()
42852   case X86ISD::BLENDV: {  in SimplifyDemandedBitsForTargetNode()
42869       return TLO.CombineTo(Op, TLO.DAG.getNode(X86ISD::BLENDV, SDLoc(Op), VT,  in SimplifyDemandedBitsForTargetNode()
43207   case X86ISD::BLENDV: {  in SimplifyMultipleUseDemandedBitsForTargetNode()
45566   if (Opcode != X86ISD::BLENDV && Opcode != ISD::VSELECT)  in narrowVectorSelect()
45674        N->getOpcode() != X86ISD::BLENDV) ||  in combineVSelectToBLENDV()
45718            UI->getOpcode() != X86ISD::BLENDV) ||  in combineVSelectToBLENDV()
45740       if (U->getOpcode() == X86ISD::BLENDV)  in combineVSelectToBLENDV()
45743       SDValue SB = DAG.getNode(X86ISD::BLENDV, SDLoc(U), U->getValueType(0),  in combineVSelectToBLENDV()
45754     return DAG.getNode(X86ISD::BLENDV, DL, N->getValueType(0), V,  in combineVSelectToBLENDV()
45891       (N->getOpcode() == ISD::VSELECT || N->getOpcode() == X86ISD::BLENDV)) {  in combineSelect()
45894                                      N->getOpcode() == X86ISD::BLENDV))  in combineSelect()
56647     case X86ISD::BLENDV:  in combineConcatVectorOps()
57765   case X86ISD::BLENDV:      return combineSelect(N, DAG, DCI, Subtarget);  in PerformDAGCombine()