Lines Matching refs:AmtVT
25237 MVT AmtVT = ShAmt.getSimpleValueType(); in getTargetVShiftNode() local
25238 assert(AmtVT.isVector() && "Vector shift type mismatch"); in getTargetVShiftNode()
25239 assert(0 <= ShAmtIdx && ShAmtIdx < (int)AmtVT.getVectorNumElements() && in getTargetVShiftNode()
25244 SmallVector<int> Mask(AmtVT.getVectorNumElements(), -1); in getTargetVShiftNode()
25246 ShAmt = DAG.getVectorShuffle(AmtVT, dl, ShAmt, DAG.getUNDEF(AmtVT), Mask); in getTargetVShiftNode()
25250 if (AmtVT.getScalarSizeInBits() == 64 && in getTargetVShiftNode()
25256 AmtVT = ShAmt.getSimpleValueType(); in getTargetVShiftNode()
25263 if (AmtVT.getScalarSizeInBits() < 64) { in getTargetVShiftNode()
25271 AmtVT = MVT::v4i32; in getTargetVShiftNode()
25278 AmtVT.getVectorNumElements(), in getTargetVShiftNode()
25279 DAG.getConstant(0, dl, AmtVT.getScalarType())); in getTargetVShiftNode()
25280 MaskElts[0] = DAG.getAllOnesConstant(dl, AmtVT.getScalarType()); in getTargetVShiftNode()
25281 SDValue Mask = DAG.getBuildVector(AmtVT, dl, MaskElts); in getTargetVShiftNode()
25282 if ((Mask = DAG.FoldConstantArithmetic(ISD::AND, dl, AmtVT, in getTargetVShiftNode()
25284 ShAmt = DAG.getNode(ISD::AND, dl, AmtVT, ShAmt.getOperand(0), Mask); in getTargetVShiftNode()
25291 if (AmtVT.getSizeInBits() > 128) { in getTargetVShiftNode()
25293 AmtVT = ShAmt.getSimpleValueType(); in getTargetVShiftNode()
25298 if (!IsMasked && AmtVT.getScalarSizeInBits() < 64) { in getTargetVShiftNode()
25299 if (AmtVT == MVT::v4i32 && (ShAmt.getOpcode() == X86ISD::VBROADCAST || in getTargetVShiftNode()
25307 (128 - AmtVT.getScalarSizeInBits()) / 8, SDLoc(ShAmt), MVT::i8); in getTargetVShiftNode()
41965 MVT AmtVT = Amt.getSimpleValueType(); in SimplifyDemandedVectorEltsForTargetNode() local
41966 assert(AmtVT.is128BitVector() && "Unexpected value type"); in SimplifyDemandedVectorEltsForTargetNode()
41978 unsigned NumAmtElts = AmtVT.getVectorNumElements(); in SimplifyDemandedVectorEltsForTargetNode()