Lines Matching full:blends

1364     // We directly match byte blends in the backend as they match the VSELECT  in X86TargetLowering()
9378 // designed to handle arbitrary vector shuffles and blends, gracefully
10668 assert(Subtarget.hasAVX2() && "256-bit integer blends require AVX2!"); in lowerShuffleAsBlend()
10672 assert(Subtarget.hasAVX() && "256-bit float blends require AVX!"); in lowerShuffleAsBlend()
10679 assert(Subtarget.hasSSE41() && "128-bit blends require SSE41!"); in lowerShuffleAsBlend()
10683 assert(Subtarget.hasAVX2() && "v16i16 blends require AVX2!"); in lowerShuffleAsBlend()
10712 assert(Subtarget.hasAVX2() && "256-bit byte-blends require AVX2!"); in lowerShuffleAsBlend()
10715 assert(Subtarget.hasSSE41() && "128-bit byte-blends require SSE41!"); in lowerShuffleAsBlend()
10830 // If only immediate blends, then bail if the blend mask can't be widened to in lowerShuffleAsBlendAndPermute()
11150 /// blends and permutes.
11155 /// blends. For vXi8/vXi16 shuffles we may use unpack instead of blend.
11220 // Only prefer immediate blends to unpack/rotate. in lowerShuffleAsDecomposedShuffleMerge()
11238 // Unpack/rotate failed - try again with variable blends. in lowerShuffleAsDecomposedShuffleMerge()
12048 /// can to emit an efficient lowering. It handles both blends with all-zero
12871 /// the integer unit to minimize domain crossing penalties. However, for blends
12953 // If we have direct support for blends, we should lower by decomposing into in lowerV2I64Shuffle()
13128 // There are special ways we can lower some single-element blends. However, we in lowerV4F32Shuffle()
13129 // have custom ways we can lower more complex single-element blends below that in lowerV4F32Shuffle()
13169 /// blends we use the floating point domain blend instructions.
13233 // There are special ways we can lower some single-element blends. in lowerV4I32Shuffle()
13272 // If we have direct support for blends, we should lower by decomposing into in lowerV4I32Shuffle()
13858 /// This handles both single-input shuffles and combined shuffle/blends with
13862 /// The blends are lowered in one of three fundamental ways. If there are few
13942 // There are special ways we can lower some single-element blends. in lowerV8I16Shuffle()
14066 // decompose into single-input permutes and blends/unpacks. in lowerV8I16Shuffle()
14145 /// the existing lowering for v8i16 blends on each half, finally PACK-ing them
14323 // blends but after all of the single-input lowerings. If the single input in lowerV16I8Shuffle()
14334 // FIXME: The only exceptions to the above are blends which are exact in lowerV16I8Shuffle()
14345 // do so. This avoids using them to handle blends-with-zero which is in lowerV16I8Shuffle()
14386 // There are special ways we can lower some single-element blends. in lowerV16I8Shuffle()
14568 // Now create two 4-way blends of these half-width vectors. in splitAndLowerShuffle()
14987 // Blends are faster and handle all the non-lane-crossing cases. in lowerV2X128Shuffle()
16112 // have already handled any direct blends. in lowerV8F32Shuffle()
17767 // shuffles and re-use the shuffle lowering path for blends. in lowerVSELECTtoVectorShuffle()
17810 // Variable blends are only legal from SSE4.1 onward. in LowerVSELECT()
17867 // Most of the vector types have blends past SSE4.1. in LowerVSELECT()
17871 // The byte blends for AVX vectors were introduced only in AVX2. in LowerVSELECT()
18390 // than an insertps. Blends are simpler operations in hardware and so in LowerINSERT_VECTOR_ELT()
38693 // Prefer blends for sequential shuffles unless we are optimizing for size. in combineX86ShuffleChain()
38712 // Prefer blends to X86ISD::VPERM2X128. in combineX86ShuffleChain()
41759 // If we have legalized the vector types, look for blends of FADD and FSUB in combineShuffle()
45665 /// condition so that blends can use the high (sign) bit of each element.
45694 // FIXME: We don't support i16-element blends currently. We could and in combineVSelectToBLENDV()
45702 // Byte blends are only available in AVX2 in combineVSelectToBLENDV()