1 //===-- X86FastPreTileConfig.cpp - Fast Tile Register Configure------------===//
9 /// \file Pass to preconfig the shape of physical tile registers
10 /// It inserts ldtilecfg ahead of each group of tile registers. The algorithm
11 /// walk each instruction of basic block in reverse order. All the tile
64   /// Has a bit set for tile virtual register for which it was determined
84     return "Fast Tile Register Preconfigure";  in getPassName()
87   /// Perform tile register configure.
98                       "Fast Tile Register Preconfigure", false, false)
100                     "Fast Tile Register Preconfigure", false, false)
149     // The use and def are in the same MBB. If the tile register is  in mayLiveOut()
151     // tile register.  in mayLiveOut()
208   // Don't need shape information for tile store, becasue it is adjacent to  in spill()
209   // the tile def instruction.  in spill()
272   // The instruction must have 3 operands: tile def, row, col.  in isTileDef()
342     // Get the 2 incoming value of tile register and MBB.  in convertPHI()
395       // The incoming tile register live out of its def BB, it would be spilled.  in convertPHI()
396       // Create MI to get the spill stack slot address for the tile register  in convertPHI()
443   // Canonicalize the phi node first. One tile phi may depeneds previous  in canonicalizePHIs()
504 // PreTileConfig should configure the tile registers based on basic
537     // Don't collect the shape of used tile, the tile should be defined  in configBasicBlock()
538     // before the tile use. Spill and reload would happen if there is only  in configBasicBlock()
539     // tile use after ldtilecfg, so the shape can be collected from reload.  in configBasicBlock()
551     // According to AMX ABI, all the tile registers including config register  in configBasicBlock()
641   // Configure tile registers at the head of the MBB  in configBasicBlock()
685   // ldtilecfg for tile registers. The reserse post order is to facilitate  in runOnMachineFunction()