334   switch (VT.SimpleTy) {  in X86FastEmitLoad()
491   switch (VT.getSimpleVT().SimpleTy) {  in X86FastEmitStore()
663     switch (VT.getSimpleVT().SimpleTy) {  in X86FastEmitStore()
1364   switch (VT.getSimpleVT().SimpleTy) {  in X86ChooseCmpOpcode()
1386   switch (VT.getSimpleVT().SimpleTy) {  in X86ChooseCmpImmediateOpcode()
1557     switch (SrcVT.SimpleTy) {  in X86SelectZExt()
1725       switch (SourceVT.SimpleTy) {  in X86SelectBranch()
1924   switch (VT.SimpleTy) {  in X86SelectDivRem()
2253     switch (RetVT.SimpleTy) {  in X86FastEmitSSESelect()
2276   switch (RetVT.SimpleTy) {  in X86FastEmitPseudoSelect()
2671     switch (VT.SimpleTy) {  in fastLowerIntrinsicCall()
2811     switch (VT.SimpleTy) {  in fastLowerIntrinsicCall()
2908                 TII.get(Opc[IsDec][VT.SimpleTy-MVT::i8]), ResultReg)  in fastLowerIntrinsicCall()
2931               TII.get(TargetOpcode::COPY), Reg[VT.SimpleTy-MVT::i8])  in fastLowerIntrinsicCall()
2933       ResultReg = fastEmitInst_r(MULOpc[VT.SimpleTy-MVT::i8],  in fastLowerIntrinsicCall()
2946         ResultReg = fastEmitInst_rr(MULOpc[VT.SimpleTy-MVT::i8],  in fastLowerIntrinsicCall()
3000     switch (VT.SimpleTy) {  in fastLowerIntrinsicCall()
3129     switch (ArgVT.getSimpleVT().SimpleTy) {  in fastLowerArguments()
3167     switch (VT.SimpleTy) {  in fastLowerArguments()
3733     switch (VT.SimpleTy) {  in X86MaterializeInt()
3753   switch (VT.SimpleTy) {  in X86MaterializeInt()
3790   switch (VT.SimpleTy) {  in X86MaterializeFP()
3824   Register ResultReg = createResultReg(TLI.getRegClassFor(VT.SimpleTy));  in X86MaterializeFP()
3902     switch (VT.SimpleTy) {  in fastMaterializeConstant()
3965   switch (VT.SimpleTy) {  in fastMaterializeFloatZero()