1733         Register OpReg = getRegForValue(TI->getOperand(0));  in X86SelectBranch()  local
1734         if (OpReg == 0) return false;  in X86SelectBranch()
1737           .addReg(OpReg).addImm(1);  in X86SelectBranch()
1768   Register OpReg = getRegForValue(BI->getCondition());  in X86SelectBranch()  local
1769   if (OpReg == 0) return false;  in X86SelectBranch()
1772   if (MRI.getRegClass(OpReg) == &X86::VK1RegClass) {  in X86SelectBranch()
1773     unsigned KOpReg = OpReg;  in X86SelectBranch()
1774     OpReg = createResultReg(&X86::GR32RegClass);  in X86SelectBranch()
1776             TII.get(TargetOpcode::COPY), OpReg)  in X86SelectBranch()
1778     OpReg = fastEmitInst_extractsubreg(MVT::i8, OpReg, X86::sub_8bit);  in X86SelectBranch()
1781       .addReg(OpReg)  in X86SelectBranch()
1790   unsigned CReg = 0, OpReg = 0;  in X86SelectShift()  local
1796     case Instruction::LShr: OpReg = X86::SHR8rCL; break;  in X86SelectShift()
1797     case Instruction::AShr: OpReg = X86::SAR8rCL; break;  in X86SelectShift()
1798     case Instruction::Shl:  OpReg = X86::SHL8rCL; break;  in X86SelectShift()
1806     case Instruction::LShr: OpReg = X86::SHR16rCL; break;  in X86SelectShift()
1807     case Instruction::AShr: OpReg = X86::SAR16rCL; break;  in X86SelectShift()
1808     case Instruction::Shl:  OpReg = X86::SHL16rCL; break;  in X86SelectShift()
1815     case Instruction::LShr: OpReg = X86::SHR32rCL; break;  in X86SelectShift()
1816     case Instruction::AShr: OpReg = X86::SAR32rCL; break;  in X86SelectShift()
1817     case Instruction::Shl:  OpReg = X86::SHL32rCL; break;  in X86SelectShift()
1824     case Instruction::LShr: OpReg = X86::SHR64rCL; break;  in X86SelectShift()
1825     case Instruction::AShr: OpReg = X86::SAR64rCL; break;  in X86SelectShift()
1826     case Instruction::Shl:  OpReg = X86::SHL64rCL; break;  in X86SelectShift()
1852   BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(OpReg), ResultReg)  in X86SelectShift()
2362       Register OpReg = getRegForValue(Opnd);  in X86SelectSelect()  local
2363       if (OpReg == 0)  in X86SelectSelect()
2369         .addReg(OpReg);  in X86SelectSelect()
2407   Register OpReg = getRegForValue(I->getOperand(0));  in X86SelectIntToFP()  local
2408   if (OpReg == 0)  in X86SelectIntToFP()
2439   Register ResultReg = fastEmitInst_rr(Opcode, RC, ImplicitDefReg, OpReg);  in X86SelectIntToFP()
2461   Register OpReg = getRegForValue(I->getOperand(0));  in X86SelectFPExtOrFPTrunc()  local
2462   if (OpReg == 0)  in X86SelectFPExtOrFPTrunc()
2481   MIB.addReg(OpReg);  in X86SelectFPExtOrFPTrunc()