Lines Matching refs:MBBI
65 MachineBasicBlock::iterator MBBI);
67 MachineBasicBlock::iterator MBBI);
68 bool expandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI);
91 MachineBasicBlock *MBB, MachineBasicBlock::iterator MBBI) { in INITIALIZE_PASS()
93 MachineInstr *JTInst = &*MBBI; in INITIALIZE_PASS()
107 BuildMI(*MBB, MBBI, DL, TII->get(X86::LEA64r), X86::R11) in INITIALIZE_PASS()
114 BuildMI(*MBB, MBBI, DL, TII->get(X86::CMP64rr)) in INITIALIZE_PASS()
128 BuildMI(*MBB, MBBI, DL, TII->get(X86::JCC_1)).addMBB(ThenMBB).addImm(CC); in INITIALIZE_PASS()
133 MBBI = MBB->end(); in INITIALIZE_PASS()
143 BuildMI(*MBB, MBBI, DL, TII->get(X86::TAILJMPd64)) in INITIALIZE_PASS()
178 MBBI = MBB->end(); in INITIALIZE_PASS()
192 MachineBasicBlock::iterator MBBI) { in expandCALL_RVMARKER() argument
195 MachineInstr &MI = *MBBI; in expandCALL_RVMARKER()
210 OriginalCall = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc)).getInstr(); in expandCALL_RVMARKER()
230 auto *Marker = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(X86::MOV64rr)) in expandCALL_RVMARKER()
241 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(X86::CALL64pcrel32)) in expandCALL_RVMARKER()
263 MachineBasicBlock::iterator MBBI) { in expandMI() argument
264 MachineInstr &MI = *MBBI; in expandMI()
266 const DebugLoc &DL = MBBI->getDebugLoc(); in expandMI()
280 MachineOperand &JumpTarget = MBBI->getOperand(0); in expandMI()
281 MachineOperand &StackAdjust = MBBI->getOperand(isMem ? X86::AddrNumOperands in expandMI()
301 Offset += X86FL->mergeSPUpdates(MBB, MBBI, true); in expandMI()
302 X86FL->emitSPUpdate(MBB, MBBI, DL, Offset, /*InEpilogue=*/true); in expandMI()
329 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op)); in expandMI()
339 MIB.addImm(MBBI->getOperand(2).getImm()); in expandMI()
346 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op)); in expandMI()
348 MIB.add(MBBI->getOperand(i)); in expandMI()
351 BuildMI(MBB, MBBI, DL, in expandMI()
356 BuildMI(MBB, MBBI, DL, TII->get(X86::TAILJMPr)) in expandMI()
360 MachineInstr &NewMI = *std::prev(MBBI); in expandMI()
361 NewMI.copyImplicitOps(*MBBI->getParent()->getParent(), *MBBI); in expandMI()
365 if (MBBI->isCandidateForCallSiteEntry()) in expandMI()
366 MBB.getParent()->moveCallSiteInfo(&*MBBI, &NewMI); in expandMI()
369 MBB.erase(MBBI); in expandMI()
375 MachineOperand &DestAddr = MBBI->getOperand(0); in expandMI()
380 BuildMI(MBB, MBBI, DL, in expandMI()
388 int64_t StackAdj = MBBI->getOperand(0).getImm(); in expandMI()
389 X86FL->emitSPUpdate(MBB, MBBI, DL, StackAdj, true); in expandMI()
396 BuildMI(MBB, MBBI, DL, TII->get(RetOp)); in expandMI()
397 MBB.erase(MBBI); in expandMI()
402 int64_t StackAdj = MBBI->getOperand(0).getImm(); in expandMI()
405 MIB = BuildMI(MBB, MBBI, DL, in expandMI()
408 MIB = BuildMI(MBB, MBBI, DL, in expandMI()
416 BuildMI(MBB, MBBI, DL, TII->get(X86::POP32r)).addReg(X86::ECX, RegState::Define); in expandMI()
417 X86FL->emitSPUpdate(MBB, MBBI, DL, StackAdj, /*InEpilogue=*/true); in expandMI()
418 BuildMI(MBB, MBBI, DL, TII->get(X86::PUSH32r)).addReg(X86::ECX); in expandMI()
419 MIB = BuildMI(MBB, MBBI, DL, TII->get(X86::RET32)); in expandMI()
421 for (unsigned I = 1, E = MBBI->getNumOperands(); I != E; ++I) in expandMI()
422 MIB.add(MBBI->getOperand(I)); in expandMI()
423 MBB.erase(MBBI); in expandMI()
433 const MachineOperand &InArg = MBBI->getOperand(6); in expandMI()
434 Register SaveRbx = MBBI->getOperand(7).getReg(); in expandMI()
440 TII->copyPhysReg(MBB, MBBI, DL, X86::RBX, InArg.getReg(), false); in expandMI()
442 MachineInstr *NewInstr = BuildMI(MBB, MBBI, DL, TII->get(X86::LCMPXCHG16B)); in expandMI()
445 NewInstr->addOperand(MBBI->getOperand(Idx)); in expandMI()
447 TII->copyPhysReg(MBB, MBBI, DL, X86::RBX, SaveRbx, in expandMI()
451 MBBI->eraseFromParent(); in expandMI()
463 int64_t Disp = MBBI->getOperand(1 + X86::AddrDisp).getImm(); in expandMI()
465 Register Reg = MBBI->getOperand(0).getReg(); in expandMI()
466 bool DstIsDead = MBBI->getOperand(0).isDead(); in expandMI()
471 BuildMI(MBB, MBBI, DL, TII->get(GET_EGPR_IF_ENABLED(X86::KMOVWkm))) in expandMI()
474 BuildMI(MBB, MBBI, DL, TII->get(GET_EGPR_IF_ENABLED(X86::KMOVWkm))) in expandMI()
478 MIBLo.add(MBBI->getOperand(1 + i)); in expandMI()
482 MIBHi.add(MBBI->getOperand(1 + i)); in expandMI()
486 MachineMemOperand *OldMMO = MBBI->memoperands().front(); in expandMI()
495 MBB.erase(MBBI); in expandMI()
499 int64_t Disp = MBBI->getOperand(X86::AddrDisp).getImm(); in expandMI()
501 Register Reg = MBBI->getOperand(X86::AddrNumOperands).getReg(); in expandMI()
502 bool SrcIsKill = MBBI->getOperand(X86::AddrNumOperands).isKill(); in expandMI()
507 BuildMI(MBB, MBBI, DL, TII->get(GET_EGPR_IF_ENABLED(X86::KMOVWmk))); in expandMI()
509 BuildMI(MBB, MBBI, DL, TII->get(GET_EGPR_IF_ENABLED(X86::KMOVWmk))); in expandMI()
512 MIBLo.add(MBBI->getOperand(i)); in expandMI()
516 MIBHi.add(MBBI->getOperand(i)); in expandMI()
522 MachineMemOperand *OldMMO = MBBI->memoperands().front(); in expandMI()
531 MBB.erase(MBBI); in expandMI()
541 const MachineOperand &InArg = MBBI->getOperand(1); in expandMI()
544 TII->copyPhysReg(MBB, MBBI, DL, X86::EBX, InArg.getReg(), InArg.isKill()); in expandMI()
546 BuildMI(MBB, MBBI, DL, TII->get(X86::MWAITXrrr)); in expandMI()
548 Register SaveRbx = MBBI->getOperand(2).getReg(); in expandMI()
549 TII->copyPhysReg(MBB, MBBI, DL, X86::RBX, SaveRbx, /*SrcIsKill*/ true); in expandMI()
551 MBBI->eraseFromParent(); in expandMI()
555 expandICallBranchFunnel(&MBB, MBBI); in expandMI()
614 expandCALL_RVMARKER(MBB, MBBI); in expandMI()
692 BuildMI(MBB, std::next(MBBI), DL, TII->get(Opc), DestReg) in expandMI()
808 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end(); in expandMBB() local
809 while (MBBI != E) { in expandMBB()
810 MachineBasicBlock::iterator NMBBI = std::next(MBBI); in expandMBB()
811 Modified |= expandMI(MBB, MBBI); in expandMBB()
812 MBBI = NMBBI; in expandMBB()