Lines Matching +full:tri +full:- +full:state
1 //=== X86CallingConv.cpp - X86 Custom Calling Convention Impl -*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
31 CCState &State) {
42 if (!State.isAllocated(Reg))
48 return false; // Not enough free registers - continue the search.
54 unsigned Reg = State.AllocateReg(AvailableRegs[I]);
61 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
64 // Successful in allocating registers - stop scanning next rules.
95 CCState &State) {
99 State.getMachineFunction().getSubtarget())
103 // If the register is not marked as allocated - assign to it.
104 if (!State.isAllocated(Reg)) {
105 unsigned AssigedReg = State.AllocateReg(Reg);
107 State.addLoc(
111 // If the register is marked as shadow allocated - assign to it.
112 if (Is64bit && State.IsShadowAllocatedReg(Reg)) {
113 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
131 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
136 ArgFlags, State);
141 // "A vector type is either a floating-point type, for example,
148 if (State.isAllocated(X86::R9)) {
150 (void)State.AllocateReg(CC_X86_VectorCallGetSSEs(ValVT));
158 (void)State.AllocateReg(CC_X86_64_VectorCallGetGPRs());
160 // Assign XMM register - (shadow for HVA and non-shadow for non HVA).
161 if (unsigned Reg = State.AllocateReg(CC_X86_VectorCallGetSSEs(ValVT))) {
166 const TargetRegisterInfo *TRI =
167 State.getMachineFunction().getSubtarget().getRegisterInfo();
168 if (TRI->regsOverlap(Reg, X86::XMM4) ||
169 TRI->regsOverlap(Reg, X86::XMM5))
170 State.AllocateStack(8, Align(8));
173 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
174 return true; // Allocated a register - Stop the search.
179 // If this is an HVA - Stop the search,
191 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
196 ArgFlags, State);
209 return true; // If this is an HVA - Stop the search.
212 if (unsigned Reg = State.AllocateReg(CC_X86_VectorCallGetSSEs(ValVT))) {
213 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
217 // In case we did not find an available XMM register for a vector -
226 return false; // No register was assigned - Continue the search.
240 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
246 SmallVectorImpl<CCValAssign> &PendingMembers = State.getPendingLocs();
262 if (unsigned Reg = State.AllocateReg(RegList)) {
263 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
278 unsigned FirstFree = State.getFirstUnallocated(RegList);
279 bool UseRegs = PendingMembers.size() <= std::min(2U, NumRegs - FirstFree);
283 It.convertToReg(State.AllocateReg(RegList[FirstFree++]));
285 It.convertToMem(State.AllocateStack(4, Align(4)));
286 State.addLoc(It);
300 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
301 const MachineFunction &MF = State.getMachineFunction();
302 size_t ArgCount = State.getMachineFunction().getFunction().arg_size();
309 Offset = State.AllocateStack(5 * SlotSize, Align(4));
320 (void)State.AllocateStack(6 * SlotSize, Align(4));
330 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
336 ISD::ArgFlagsTy &ArgFlags, CCState &State) {