Lines Matching full:slow
458 def TuningSlowSHLD : SubtargetFeature<"slow-shld", "IsSHLDSlow", "true",
459 "SHLD instruction is slow">;
461 def TuningSlowPMULLD : SubtargetFeature<"slow-pmulld", "IsPMULLDSlow", "true",
462 … "PMULLD instruction is slow (compared to PMULLW/PMULHW and PMULUDQ)">;
464 def TuningSlowPMADDWD : SubtargetFeature<"slow-pmaddwd", "IsPMADDWDSlow",
469 def TuningSlowUAMem16 : SubtargetFeature<"slow-unaligned-mem-16",
471 "Slow unaligned 16-byte memory access">;
473 def TuningSlowUAMem32 : SubtargetFeature<"slow-unaligned-mem-32",
475 "Slow unaligned 32-byte memory access">;
497 // slow. In practice, this means that CALL, PUSH, and POP with memory operands
499 def TuningSlowTwoMemOps : SubtargetFeature<"slow-two-mem-ops",
501 "Two memory operand instructions are slow">;
508 def TuningSlowLEA : SubtargetFeature<"slow-lea", "SlowLEA", "true",
509 "LEA instruction with certain arguments is slow">;
514 def TuningSlow3OpsLEA : SubtargetFeature<"slow-3ops-lea", "Slow3OpsLEA", "true",
515 "LEA instruction with 3 ops or certain registers is slow">;
517 // True if INC and DEC instructions are slow when writing to flags
518 def TuningSlowIncDec : SubtargetFeature<"slow-incdec", "SlowIncDec", "true",
596 "Vector shifts are fast (2/cycle) as opposed to slow (1/cycle)">;
1926 // basic SSE2 and 64-bit ones. It disables slow things from any mainstream and