Lines Matching refs:v2s64
63 const LLT v2s64 = LLT::fixed_vector(2, 64); in X86LegalizerInfo() local
80 const LLT s64MaxVector = HasAVX512 ? v8s64 : HasAVX ? v4s64 : v2s64; in X86LegalizerInfo()
144 if (HasSSE2 && typeInSet(0, {v16s8, v8s16, v4s32, v2s64})(Query)) in X86LegalizerInfo()
193 if (HasDQI && HasVLX && typeInSet(0, {v2s64, v4s64})(Query)) in X86LegalizerInfo()
243 if (HasSSE2 && typeInSet(0, {v16s8, v8s16, v4s32, v2s64})(Query)) in X86LegalizerInfo()
319 (HasSSE1 && typeInSet(0, {v16s8, v8s16, v4s32, v2s64})(Query)) || in X86LegalizerInfo()
385 {v2s64, p0, v2s64, 1}, in X86LegalizerInfo()
442 (HasSSE2 && typeInSet(0, {v2s64})(Query)) || in X86LegalizerInfo()
504 (HasSSE2 && typeInSet(0, {v2s64, v8s16, v16s8})(Query)) || in X86LegalizerInfo()
511 .clampNumElements(0, v2s64, s64MaxVector) in X86LegalizerInfo()
522 {v2s64, v4s64}})(Query)) || in X86LegalizerInfo()
530 {v2s64, v8s64}, in X86LegalizerInfo()
541 {v2s64, v4s64}})(Query)) || in X86LegalizerInfo()
549 {v2s64, v8s64}, in X86LegalizerInfo()