1919 static void translateRegister(MCInst &mcInst, Reg reg) {  in translateRegister()  argument
1925   mcInst.addOperand(MCOperand::createReg(llvmRegnum));  in translateRegister()
1942 static bool translateSrcIndex(MCInst &mcInst, InternalInstruction &insn) {  in translateSrcIndex()  argument
1954   mcInst.addOperand(baseReg);  in translateSrcIndex()
1958   mcInst.addOperand(segmentReg);  in translateSrcIndex()
1967 static bool translateDstIndex(MCInst &mcInst, InternalInstruction &insn) {  in translateDstIndex()  argument
1979   mcInst.addOperand(baseReg);  in translateDstIndex()
1989 static void translateImmediate(MCInst &mcInst, uint64_t immediate,  in translateImmediate()  argument
2063     mcInst.addOperand(MCOperand::createReg(X86::XMM0 + (immediate >> 4)));  in translateImmediate()
2066     mcInst.addOperand(MCOperand::createReg(X86::YMM0 + (immediate >> 4)));  in translateImmediate()
2069     mcInst.addOperand(MCOperand::createReg(X86::ZMM0 + (immediate >> 4)));  in translateImmediate()
2077           mcInst, immediate + pcrel, insn.startLocation, isBranch,  in translateImmediate()
2079     mcInst.addOperand(MCOperand::createImm(immediate));  in translateImmediate()
2084     mcInst.addOperand(segmentReg);  in translateImmediate()
2094 static bool translateRMRegister(MCInst &mcInst,  in translateRMRegister()  argument
2116     mcInst.addOperand(MCOperand::createReg(X86::x)); break;  in translateRMRegister()
2133 static bool translateRMMemory(MCInst &mcInst, InternalInstruction &insn,  in translateRMMemory()  argument
2275   mcInst.addOperand(baseReg);  in translateRMMemory()
2276   mcInst.addOperand(scaleAmount);  in translateRMMemory()
2277   mcInst.addOperand(indexReg);  in translateRMMemory()
2283           mcInst, insn.displacement + pcrel, insn.startLocation, false,  in translateRMMemory()
2285     mcInst.addOperand(displacement);  in translateRMMemory()
2286   mcInst.addOperand(segmentReg);  in translateRMMemory()
2298 static bool translateRM(MCInst &mcInst, const OperandSpecifier &operand,  in translateRM()  argument
2319     return translateRMRegister(mcInst, insn);  in translateRM()
2324     return translateRMMemory(mcInst, insn, Dis);  in translateRM()
2326     return translateRMMemory(mcInst, insn, Dis, true);  in translateRM()
2335 static void translateFPRegister(MCInst &mcInst,  in translateFPRegister()  argument
2337   mcInst.addOperand(MCOperand::createReg(X86::ST0 + stackPos));  in translateFPRegister()
2346 static bool translateMaskRegister(MCInst &mcInst,  in translateMaskRegister()  argument
2353   mcInst.addOperand(MCOperand::createReg(X86::K0 + maskRegNum));  in translateMaskRegister()
2364 static bool translateOperand(MCInst &mcInst, const OperandSpecifier &operand,  in translateOperand()  argument
2372     translateRegister(mcInst, insn.reg);  in translateOperand()
2375     return translateMaskRegister(mcInst, insn.writemask);  in translateOperand()
2379     return translateRM(mcInst, operand, insn, Dis);  in translateOperand()
2386     translateImmediate(mcInst,  in translateOperand()
2393     mcInst.addOperand(MCOperand::createImm(insn.RC));  in translateOperand()
2396     return translateSrcIndex(mcInst, insn);  in translateOperand()
2398     return translateDstIndex(mcInst, insn);  in translateOperand()
2404     translateRegister(mcInst, insn.opcodeRegister);  in translateOperand()
2407     mcInst.addOperand(MCOperand::createImm(insn.immediates[1]));  in translateOperand()
2411       mcInst.addOperand(MCOperand::createImm(insn.immediates[2]));  in translateOperand()
2413       mcInst.addOperand(MCOperand::createImm(insn.immediates[1]));  in translateOperand()
2416     translateFPRegister(mcInst, insn.modRM & 7);  in translateOperand()
2419     translateRegister(mcInst, insn.vvvv);  in translateOperand()
2422     return translateOperand(mcInst, insn.operands[operand.type - TYPE_DUP0],  in translateOperand()
2433 static bool translateInstruction(MCInst &mcInst,  in translateInstruction()  argument
2441   mcInst.clear();  in translateInstruction()
2442   mcInst.setOpcode(insn.instructionID);  in translateInstruction()
2447     if(mcInst.getOpcode() == X86::REP_PREFIX)  in translateInstruction()
2448       mcInst.setOpcode(X86::XRELEASE_PREFIX);  in translateInstruction()
2449     else if(mcInst.getOpcode() == X86::REPNE_PREFIX)  in translateInstruction()
2450       mcInst.setOpcode(X86::XACQUIRE_PREFIX);  in translateInstruction()
2457       if (translateOperand(mcInst, Op, insn, Dis)) {  in translateInstruction()