Lines Matching refs:p2align
179 SIMD_I<(outs V128:$dst), (ins P2Align:$p2align, offset32_op:$off, I32:$addr),
180 (outs), (ins P2Align:$p2align, offset32_op:$off), [],
181 "v128.load\t$dst, ${off}(${addr})$p2align",
182 "v128.load\t$off$p2align", 0>;
184 SIMD_I<(outs V128:$dst), (ins P2Align:$p2align, offset64_op:$off, I64:$addr),
185 (outs), (ins P2Align:$p2align, offset64_op:$off), [],
186 "v128.load\t$dst, ${off}(${addr})$p2align",
187 "v128.load\t$off$p2align", 0>;
200 (ins P2Align:$p2align, offset32_op:$off, I32:$addr),
202 (ins P2Align:$p2align, offset32_op:$off), [],
203 "v128.load"#size#"_splat\t$dst, ${off}(${addr})$p2align",
204 "v128.load"#size#"_splat\t$off$p2align", simdop>;
207 (ins P2Align:$p2align, offset64_op:$off, I64:$addr),
209 (ins P2Align:$p2align, offset64_op:$off), [],
210 "v128.load"#size#"_splat\t$dst, ${off}(${addr})$p2align",
211 "v128.load"#size#"_splat\t$off$p2align", simdop>;
234 (ins P2Align:$p2align, offset32_op:$off, I32:$addr),
235 (outs), (ins P2Align:$p2align, offset32_op:$off), [],
236 signed#"\t$dst, ${off}(${addr})$p2align",
237 signed#"\t$off$p2align", simdop>;
240 (ins P2Align:$p2align, offset32_op:$off, I32:$addr),
241 (outs), (ins P2Align:$p2align, offset32_op:$off), [],
242 unsigned#"\t$dst, ${off}(${addr})$p2align",
243 unsigned#"\t$off$p2align", !add(simdop, 1)>;
246 (ins P2Align:$p2align, offset64_op:$off, I64:$addr),
247 (outs), (ins P2Align:$p2align, offset64_op:$off), [],
248 signed#"\t$dst, ${off}(${addr})$p2align",
249 signed#"\t$off$p2align", simdop>;
252 (ins P2Align:$p2align, offset64_op:$off, I64:$addr),
253 (outs), (ins P2Align:$p2align, offset64_op:$off), [],
254 unsigned#"\t$dst, ${off}(${addr})$p2align",
255 unsigned#"\t$off$p2align", !add(simdop, 1)>;
278 (ins P2Align:$p2align, offset32_op:$off, I32:$addr),
279 (outs), (ins P2Align:$p2align, offset32_op:$off), [],
280 name#"\t$dst, ${off}(${addr})$p2align",
281 name#"\t$off$p2align", simdop>;
284 (ins P2Align:$p2align, offset64_op:$off, I64:$addr),
285 (outs), (ins P2Align:$p2align, offset64_op:$off), [],
286 name#"\t$dst, ${off}(${addr})$p2align",
287 name#"\t$off$p2align", simdop>;
316 (ins P2Align:$p2align, offset32_op:$off, vec_i8imm_op:$idx,
318 (outs), (ins P2Align:$p2align, offset32_op:$off, vec_i8imm_op:$idx),
319 [], name#"\t$dst, ${off}(${addr})$p2align, $vec, $idx",
320 name#"\t$off$p2align, $idx", simdop>;
323 (ins P2Align:$p2align, offset64_op:$off, vec_i8imm_op:$idx,
325 (outs), (ins P2Align:$p2align, offset64_op:$off, vec_i8imm_op:$idx),
326 [], name#"\t$dst, ${off}(${addr})$p2align, $vec, $idx",
327 name#"\t$off$p2align, $idx", simdop>;
375 SIMD_I<(outs), (ins P2Align:$p2align, offset32_op:$off, I32:$addr, V128:$vec),
376 (outs), (ins P2Align:$p2align, offset32_op:$off), [],
377 "v128.store\t${off}(${addr})$p2align, $vec",
378 "v128.store\t$off$p2align", 11>;
380 SIMD_I<(outs), (ins P2Align:$p2align, offset64_op:$off, I64:$addr, V128:$vec),
381 (outs), (ins P2Align:$p2align, offset64_op:$off), [],
382 "v128.store\t${off}(${addr})$p2align, $vec",
383 "v128.store\t$off$p2align", 11>;
397 (ins P2Align:$p2align, offset32_op:$off, vec_i8imm_op:$idx,
399 (outs), (ins P2Align:$p2align, offset32_op:$off, vec_i8imm_op:$idx),
400 [], name#"\t${off}(${addr})$p2align, $vec, $idx",
401 name#"\t$off$p2align, $idx", simdop>;
404 (ins P2Align:$p2align, offset64_op:$off, vec_i8imm_op:$idx,
406 (outs), (ins P2Align:$p2align, offset64_op:$off, vec_i8imm_op:$idx),
407 [], name#"\t${off}(${addr})$p2align, $vec, $idx",
408 name#"\t$off$p2align, $idx", simdop>;