Lines Matching refs:VE
36 VERegisterInfo::VERegisterInfo() : VEGenRegisterInfo(VE::SX10) {} in VERegisterInfo()
70 VE::SX8, // Stack limit in getReservedRegs()
71 VE::SX9, // Frame pointer in getReservedRegs()
72 VE::SX10, // Link register (return address) in getReservedRegs()
73 VE::SX11, // Stack pointer in getReservedRegs()
76 VE::SX12, // Outer register in getReservedRegs()
77 VE::SX13, // Id register for dynamic linker in getReservedRegs()
79 VE::SX14, // Thread pointer in getReservedRegs()
80 VE::SX15, // Global offset table register in getReservedRegs()
81 VE::SX16, // Procedure linkage table register in getReservedRegs()
82 VE::SX17, // Linkage-area register in getReservedRegs()
93 Reserved.set(VE::VM0); in getReservedRegs()
94 Reserved.set(VE::VMP0); in getReservedRegs()
102 return &VE::I64RegClass; in getPointerRegClass()
112 using namespace llvm::VE; in offsetToDisp()
190 : TII(TII), TRI(TRI), DL(DL), MBB(MBB), II(II), clobber(VE::SX13) {} in EliminateFrameIndex()
213 build(VE::LEAzii, clobber).addImm(0).addImm(0).addImm(Lo_32(Offset)); in prepareReplaceFI()
214 build(VE::ANDrm, clobber).addReg(clobber).addImm(M0(32)); in prepareReplaceFI()
215 build(VE::LEASLrri, clobber) in prepareReplaceFI()
238 assert(MI.getOpcode() == VE::STQrii); in processSTQ()
244 Register SrcHiReg = getSubReg(SrcReg, VE::sub_even); in processSTQ()
245 Register SrcLoReg = getSubReg(SrcReg, VE::sub_odd); in processSTQ()
248 build(VE::STrii).addReg(FrameReg).addImm(0).addImm(0).addReg(SrcLoReg); in processSTQ()
251 MI.setDesc(get(VE::STrii)); in processSTQ()
259 assert(MI.getOpcode() == VE::LDQrii); in processLDQ()
265 Register DestHiReg = getSubReg(DestReg, VE::sub_even); in processLDQ()
266 Register DestLoReg = getSubReg(DestReg, VE::sub_odd); in processLDQ()
269 build(VE::LDrii, DestLoReg).addReg(FrameReg).addImm(0).addImm(0); in processLDQ()
271 MI.setDesc(get(VE::LDrii)); in processLDQ()
279 assert(MI.getOpcode() == VE::STVMrii); in processSTVM()
300 Register TmpReg = VE::SX16; in processSTVM()
302 build(VE::SVMmr, TmpReg).addReg(SrcReg).addImm(i); in processSTVM()
304 build(VE::STrii).addReg(FrameReg).addImm(0).addImm(0).addReg( in processSTVM()
309 build(VE::SVMmr, TmpReg).addReg(SrcReg, getKillRegState(isKill)).addImm(3); in processSTVM()
310 MI.setDesc(get(VE::STrii)); in processSTVM()
317 assert(MI.getOpcode() == VE::LDVMrii); in processLDVM()
337 unsigned TmpReg = VE::SX16; in processLDVM()
341 build(VE::LDrii, TmpReg).addReg(FrameReg).addImm(0).addImm(0); in processLDVM()
346 MI.setDesc(get(VE::LDrii)); in processLDVM()
352 build(VE::LVMir, DestReg).addImm(i).addReg(TmpReg, getKillRegState(true)); in processLDVM()
354 build(VE::LVMir_m, DestReg) in processLDVM()
359 BuildMI(*MI.getParent(), std::next(II), DL, get(VE::LVMir_m), DestReg) in processLDVM()
369 assert(MI.getOpcode() == VE::STVM512rii); in processSTVM512()
375 Register SrcLoReg = getSubReg(SrcReg, VE::sub_vm_odd); in processSTVM512()
376 Register SrcHiReg = getSubReg(SrcReg, VE::sub_vm_even); in processSTVM512()
380 Register TmpReg = VE::SX16; in processSTVM512()
384 LastMI = build(VE::SVMmr, TmpReg).addReg(SrcLoReg).addImm(i); in processSTVM512()
386 build(VE::STrii).addReg(FrameReg).addImm(0).addImm(0).addReg( in processSTVM512()
395 build(VE::SVMmr, TmpReg).addReg(SrcHiReg).addImm(i); in processSTVM512()
397 build(VE::STrii).addReg(FrameReg).addImm(0).addImm(0).addReg( in processSTVM512()
402 LastMI = build(VE::SVMmr, TmpReg).addReg(SrcHiReg).addImm(3); in processSTVM512()
408 MI.setDesc(get(VE::STrii)); in processSTVM512()
415 assert(MI.getOpcode() == VE::LDVM512rii); in processLDVM512()
421 Register DestLoReg = getSubReg(DestReg, VE::sub_vm_odd); in processLDVM512()
422 Register DestHiReg = getSubReg(DestReg, VE::sub_vm_even); in processLDVM512()
425 Register TmpReg = VE::SX16; in processLDVM512()
426 build(VE::IMPLICIT_DEF, DestReg); in processLDVM512()
429 build(VE::LDrii, TmpReg).addReg(FrameReg).addImm(0).addImm(0); in processLDVM512()
431 build(VE::LVMir_m, DestLoReg) in processLDVM512()
439 build(VE::LDrii, TmpReg).addReg(FrameReg).addImm(0).addImm(0); in processLDVM512()
441 build(VE::LVMir_m, DestHiReg) in processLDVM512()
447 MI.setDesc(get(VE::LDrii)); in processLDVM512()
449 BuildMI(*MI.getParent(), std::next(II), DL, get(VE::LVMir_m), DestHiReg) in processLDVM512()
459 case VE::STQrii: in processMI()
462 case VE::LDQrii: in processMI()
465 case VE::STVMrii: in processMI()
468 case VE::LDVMrii: in processMI()
471 case VE::STVM512rii: in processMI()
474 case VE::LDVM512rii: in processMI()
509 return VE::SX9; in getFrameRegister()