Lines Matching refs:TmpReg
300 Register TmpReg = VE::SX16; in processSTVM() local
302 build(VE::SVMmr, TmpReg).addReg(SrcReg).addImm(i); in processSTVM()
305 TmpReg, getKillRegState(true)); in processSTVM()
309 build(VE::SVMmr, TmpReg).addReg(SrcReg, getKillRegState(isKill)).addImm(3); in processSTVM()
311 MI.getOperand(3).ChangeToRegister(TmpReg, false, false, true); in processSTVM()
337 unsigned TmpReg = VE::SX16; in processLDVM() local
341 build(VE::LDrii, TmpReg).addReg(FrameReg).addImm(0).addImm(0); in processLDVM()
347 MI.getOperand(0).ChangeToRegister(TmpReg, true); in processLDVM()
352 build(VE::LVMir, DestReg).addImm(i).addReg(TmpReg, getKillRegState(true)); in processLDVM()
356 .addReg(TmpReg, getKillRegState(true)) in processLDVM()
361 .addReg(TmpReg, getKillRegState(true)) in processLDVM()
380 Register TmpReg = VE::SX16; in processSTVM512() local
384 LastMI = build(VE::SVMmr, TmpReg).addReg(SrcLoReg).addImm(i); in processSTVM512()
387 TmpReg, getKillRegState(true)); in processSTVM512()
395 build(VE::SVMmr, TmpReg).addReg(SrcHiReg).addImm(i); in processSTVM512()
398 TmpReg, getKillRegState(true)); in processSTVM512()
402 LastMI = build(VE::SVMmr, TmpReg).addReg(SrcHiReg).addImm(3); in processSTVM512()
409 MI.getOperand(3).ChangeToRegister(TmpReg, false, false, true); in processSTVM512()
425 Register TmpReg = VE::SX16; in processLDVM512() local
429 build(VE::LDrii, TmpReg).addReg(FrameReg).addImm(0).addImm(0); in processLDVM512()
433 .addReg(TmpReg, getKillRegState(true)) in processLDVM512()
439 build(VE::LDrii, TmpReg).addReg(FrameReg).addImm(0).addImm(0); in processLDVM512()
443 .addReg(TmpReg, getKillRegState(true)) in processLDVM512()
448 MI.getOperand(0).ChangeToRegister(TmpReg, true); in processLDVM512()
451 .addReg(TmpReg, getKillRegState(true)) in processLDVM512()