Lines Matching full:zx
169 let cx = 1 in defm VLDLZX : VLDm<"vldl.zx", 0x83, V64>;
179 let cx = 1 in defm VLDL2DZX : VLDm<"vldl2d.zx", 0xc3, V64>;
292 let cx = 1 in defm VGTLZX : VGTm<"vgtl.zx", 0xa3, V64>;
293 def : MnemonicAlias<"vgtl", "vgtl.zx">;
294 def : MnemonicAlias<"vgtl.nc", "vgtl.zx.nc">;
837 defm VADDSWZX : RVm<"vadds.w.zx", 0xca, V64, I32, VM>;
844 def : MnemonicAlias<"vadds.w.zx", "pvadds.lo">;
846 def : MnemonicAlias<"pvadds.lo.zx", "pvadds.lo">;
871 defm VSUBSWZX : RVm<"vsubs.w.zx", 0xda, V64, I32, VM>;
878 def : MnemonicAlias<"vsubs.w.zx", "pvsubs.lo">;
880 def : MnemonicAlias<"pvsubs.lo.zx", "pvsubs.lo">;
895 defm VMULSWZX : RVm<"vmuls.w.zx", 0xcb, V64, I32, VM>;
896 def : MnemonicAlias<"vmuls.w", "vmuls.w.zx">;
914 defm VDIVSWZX : RVDIVm<"vdivs.w.zx", 0xeb, V64, I32, VM>;
915 def : MnemonicAlias<"vdivs.w", "vdivs.w.zx">;
940 defm VCMPSWZX : RVm<"vcmps.w.zx", 0xfa, V64, I32, VM>;
947 def : MnemonicAlias<"vcmps.w.zx", "pvcmps.lo">;
949 def : MnemonicAlias<"pvcmps.lo.zx", "pvcmps.lo">;
960 defm VMAXSWZX : RVm<"vmaxs.w.zx", 0x8a, V64, I32, VM>;
972 defm VMINSWZX : RVm<"vmins.w.zx", 0x8a, V64, I32, VM>;
980 def : MnemonicAlias<"vmaxs.w.zx", "pvmaxs.lo">;
982 def : MnemonicAlias<"pvmaxs.lo.zx", "pvmaxs.lo">;
984 def : MnemonicAlias<"vmins.w.zx", "pvmins.lo">;
986 def : MnemonicAlias<"pvmins.lo.zx", "pvmins.lo">;
1071 let isCodeGenOnly = 1 in defm VSLAWZX : RVSm<"vsla.w.zx", 0xe6, I32, V64, VM>;
1076 def : MnemonicAlias<"vsla.w.zx", "pvsla.lo">;
1078 def : MnemonicAlias<"pvsla.lo.zx", "pvsla.lo">;
1087 let isCodeGenOnly = 1 in defm VSRAWZX : RVSm<"vsra.w.zx", 0xf6, I32, V64, VM>;
1092 def : MnemonicAlias<"vsra.w.zx", "pvsra.lo">;
1094 def : MnemonicAlias<"pvsra.lo.zx", "pvsra.lo">;
1296 defm VCVTWDZX : RVFIXm<"vcvt.w.d.zx", 0xe8, V64, VM>;
1300 defm VCVTWSZX : RVFIXm<"vcvt.w.s.zx", 0xe8, V64, VM>;
1338 let cx2 = 1 in defm VSUMWZX : RVF1m<"vsum.w.zx", 0xea, V64, VM>;
1349 let cx2 = 1 in defm VRMAXSWFSTZX : RVF1m<"vrmaxs.w.fst.zx", 0xbb, V64, VM>;
1354 defm VRMAXSWLSTZX : RVF1m<"vrmaxs.w.lst.zx", 0xbb, V64, VM>;
1360 defm VRMINSWFSTZX : RVF1m<"vrmins.w.fst.zx", 0xbb, V64, VM>;
1365 defm VRMINSWLSTZX : RVF1m<"vrmins.w.lst.zx", 0xbb, V64, VM>;