Lines Matching refs:sy
23 // $sy has 7 bits to represent simm7, uimm7, simm7fp, or uimm7fp.
274 // sy: register or immediate (-64 to 63)
278 // ASX format uses sz + sy + disp.
282 // ASX format uses "disp", "disp(, sz)", "disp(sy)", "disp(sy, sz)",
283 // "(, sz)", "(sy)", or "(sy, sz)".
548 def rr : RR<opc, (outs RCo:$sx), (ins RCi:$sy, RCi:$sz),
549 !strconcat(opcStr, " $sx, $sy, $sz"),
550 [(set Tyo:$sx, (OpNode Tyi:$sy, Tyi:$sz))]>;
551 // VE calculates (OpNode $sy, $sz), but llvm requires to have immediate
554 def ri : RR<opc, (outs RCo:$sx), (ins RCi:$sz, immOp:$sy),
555 !strconcat(opcStr, " $sx, $sy, $sz"),
556 [(set Tyo:$sx, (OpNode Tyi:$sz, (Tyi immOp:$sy)))]>;
558 def rm : RR<opc, (outs RCo:$sx), (ins RCi:$sy, mOp:$sz),
559 !strconcat(opcStr, " $sx, $sy, $sz"),
560 [(set Tyo:$sx, (OpNode Tyi:$sy, (Tyi mOp:$sz)))]>;
562 def im : RR<opc, (outs RCo:$sx), (ins immOp:$sy, mOp:$sz),
563 !strconcat(opcStr, " $sx, $sy, $sz"),
564 [(set Tyo:$sx, (OpNode (Tyi immOp:$sy), (Tyi mOp:$sz)))]> {
579 def rr : RR<opc, (outs RCo:$sx), (ins RCi:$sy, RCi:$sz),
580 !strconcat(opcStr, " $sx, $sy, $sz"),
581 [(set Tyo:$sx, (OpNode Tyi:$sy, Tyi:$sz))]>;
583 def ir : RR<opc, (outs RCo:$sx), (ins immOp:$sy, RCi:$sz),
584 !strconcat(opcStr, " $sx, $sy, $sz"),
585 [(set Tyo:$sx, (OpNode (Tyi immOp:$sy), Tyi:$sz))]>;
587 def rm : RR<opc, (outs RCo:$sx), (ins RCi:$sy, mOp:$sz),
588 !strconcat(opcStr, " $sx, $sy, $sz"),
589 [(set Tyo:$sx, (OpNode Tyi:$sy, (Tyi mOp:$sz)))]>;
591 def im : RR<opc, (outs RCo:$sx), (ins immOp:$sy, mOp:$sz),
592 !strconcat(opcStr, " $sx, $sy, $sz"),
593 [(set Tyo:$sx, (OpNode (Tyi immOp:$sy), (Tyi mOp:$sz)))]>;
626 def rr : RR<opc, (outs RC:$sx), (ins RC:$sz, I32:$sy),
627 !strconcat(opcStr, " $sx, $sz, $sy"),
628 [(set Ty:$sx, (OpNode Ty:$sz, i32:$sy))]>;
630 def mr : RR<opc, (outs RC:$sx), (ins mimm:$sz, I32:$sy),
631 !strconcat(opcStr, " $sx, $sz, $sy"),
632 [(set Ty:$sx, (OpNode (Ty mimm:$sz), i32:$sy))]>;
634 def ri : RR<opc, (outs RC:$sx), (ins RC:$sz, uimm7:$sy),
635 !strconcat(opcStr, " $sx, $sz, $sy"),
636 [(set Ty:$sx, (OpNode Ty:$sz, (i32 uimm7:$sy)))]>;
638 def mi : RR<opc, (outs RC:$sx), (ins mimm:$sz, uimm7:$sy),
639 !strconcat(opcStr, " $sx, $sz, $sy"),
640 [(set Ty:$sx, (OpNode (Ty mimm:$sz), (i32 uimm7:$sy)))]>;
647 def rrr : RR<opc, (outs RC:$sx), (ins RC:$hi, RC:$sz, I32:$sy),
648 !strconcat(opcStr, " $sx, $sz, $sy")>;
650 def rmr : RR<opc, (outs RC:$sx), (ins RC:$hi, mimm:$sz, I32:$sy),
651 !strconcat(opcStr, " $sx, $sz, $sy")>;
653 def rri : RR<opc, (outs RC:$sx), (ins RC:$hi, RC:$sz, uimm7:$sy),
654 !strconcat(opcStr, " $sx, $sz, $sy")>;
656 def rmi : RR<opc, (outs RC:$sx), (ins RC:$hi, mimm:$sz, uimm7:$sy),
657 !strconcat(opcStr, " $sx, $sz, $sy")>;
664 def rrr : RR<opc, (outs RC:$sx), (ins RC:$sz, RC:$low, I32:$sy),
665 !strconcat(opcStr, " $sx, $sz, $sy")>;
667 def mrr : RR<opc, (outs RC:$sx), (ins mimm:$sz, RC:$low, I32:$sy),
668 !strconcat(opcStr, " $sx, $sz, $sy")>;
670 def rri : RR<opc, (outs RC:$sx), (ins RC:$sz, RC:$low, uimm7:$sy),
671 !strconcat(opcStr, " $sx, $sz, $sy")>;
673 def mri : RR<opc, (outs RC:$sx), (ins mimm:$sz, RC:$low, uimm7:$sy),
674 !strconcat(opcStr, " $sx, $sz, $sy")>;
679 let cy = 0, sy = 0, hasSideEffects = 0 in
694 def rr : RR<opc, (outs RC:$sx), (ins RC:$sy, RC:$sz, RC:$sd),
695 !strconcat(opcStr, " $sx, $sy, $sz")>;
697 def ir : RR<opc, (outs RC:$sx), (ins simm7:$sy, RC:$sz, RC:$sd),
698 !strconcat(opcStr, " $sx, $sy, $sz")>;
700 def rm : RR<opc, (outs RC:$sx), (ins RC:$sy, mimm:$sz, RC:$sd),
701 !strconcat(opcStr, " $sx, $sy, $sz")>;
703 def im : RR<opc, (outs RC:$sx), (ins simm7:$sy, mimm:$sz, RC:$sd),
704 !strconcat(opcStr, " $sx, $sy, $sz")>;
714 def ri : RR<opc, (outs RC:$sx), (ins RC:$sz, uimm1:$sy),
715 !strconcat(opcStr, " $sx, $sz, $sy"),
716 [(set Ty:$sx, (OpNode Ty:$sz, (i32 uimm1:$sy)))]>;
718 def mi : RR<opc, (outs RC:$sx), (ins mimm:$sz, uimm1:$sy),
719 !strconcat(opcStr, " $sx, $sz, $sy"),
720 [(set Ty:$sx, (OpNode (Ty mimm:$sz), (i32 uimm1:$sy)))]>;
730 def rr : RR<opc, (outs I64:$sx), (ins CCOp:$cfw, RC:$sy, I64:$sz, I64:$sd),
731 !strconcat(opcStr, " $sx, $sz, $sy"),
732 [(set i64:$sx, (OpNode Ty:$sy, i64:$sz, i64:$sd,
736 (ins CCOp:$cfw, immOp:$sy, I64:$sz, I64:$sd),
737 !strconcat(opcStr, " $sx, $sz, $sy"),
738 [(set i64:$sx, (OpNode (Ty immOp:$sy), i64:$sz, i64:$sd,
742 (ins CCOp:$cfw, RC:$sy, mimm:$sz, I64:$sd),
743 !strconcat(opcStr, " $sx, $sz, $sy"),
744 [(set i64:$sx, (OpNode Ty:$sy, (i64 mimm:$sz), i64:$sd,
748 (ins CCOp:$cfw, immOp:$sy, mimm:$sz, I64:$sd),
749 !strconcat(opcStr, " $sx, $sz, $sy"),
750 [(set i64:$sx, (OpNode (Ty immOp:$sy), (i64 mimm:$sz), i64:$sd,
760 def r : RR<opc, (outs RCo:$sx), (ins RDOp:$rd, RCi:$sy),
761 !strconcat(opcStr, "${rd} $sx, $sy")> {
767 def i : RR<opc, (outs RCo:$sx), (ins RDOp:$rd, simm7:$sy),
768 !strconcat(opcStr, "${rd} $sx, $sy")> {
781 def r : RR<opc, (outs RCo:$sx), (ins RCi:$sy),
782 !strconcat(opcStr, " $sx, $sy"),
783 [(set Tyo:$sx, (OpNode Tyi:$sy))]>;
785 def i : RR<opc, (outs RCo:$sx), (ins simm7:$sy),
786 !strconcat(opcStr, " $sx, $sy")>;
793 def rri : RM<opc, (outs), (ins (MEMrri $sz, $sy, $imm32):$addr), !strconcat(opcStr, " $addr"),
796 def rii : RM<opc, (outs), (ins (MEMrii $sz, $sy, $imm32):$addr), !strconcat(opcStr, " $addr"),
799 def zri : RM<opc, (outs), (ins (MEMzri $sz, $sy, $imm32):$addr), !strconcat(opcStr, " $addr"),
802 def zii : RM<opc, (outs), (ins (MEMzii $sz, $sy, $imm32):$addr), !strconcat(opcStr, " $addr"),
813 def r : RRM<opc, (outs RC:$sx), (ins (MEM $sz, $imm32):$addr, RC:$sy, RC:$sd),
814 !strconcat(opcStr, " $sx, $addr, $sy"),
815 [(set Ty:$sx, (OpNode ADDR:$addr, Ty:$sy, Ty:$sd))]>;
817 def i : RRM<opc, (outs RC:$sx), (ins (MEM $sz, $imm32):$addr, immOp:$sy, RC:$sd),
818 !strconcat(opcStr, " $sx, $addr, $sy"),
819 [(set Ty:$sx, (OpNode ADDR:$addr, (Ty immOp:$sy), Ty:$sd))]>;
850 defm r : BCtgm<opcStr, "$sy, ", opc, (ins CCOp:$cond, RC:$sy)>;
852 defm i : BCtgm<opcStr, "$sy, ", opc, (ins CCOp:$cond, immOp:$sy)>;
853 let DecoderMethod = "DecodeBranchConditionAlways", cy = 0, sy = 0,
856 let DecoderMethod = "DecodeBranchConditionAlways", cy = 0, sy = 0,
877 defm rr : BCRbpfm<opcStr, "$sy, $sz, ", opc, (ins CCOp:$cond, RC:$sy, RC:$sz)>;
879 defm ir : BCRbpfm<opcStr, "$sy, $sz, ", opc, (ins CCOp:$cond, immOp:$sy,
882 defm rz : BCRbpfm<opcStr, "$sy, $sz, ", opc, (ins CCOp:$cond, RC:$sy,
885 defm iz : BCRbpfm<opcStr, "$sy, $sz, ", opc, (ins CCOp:$cond, immOp:$sy,
887 let cy = 0, sy = 0, cz = 0, sz = 0, cond = 15 /* AT */, isBarrier = 1 in
889 let cy = 0, sy = 0, cz = 0, sz = 0, cond = 0 /* AF */ in
897 def rr : RR<opc, (outs RC:$sx), (ins RC:$sy, RC:$sz),
898 !strconcat(opcStr, " $sx, $sy, $sz")>;
899 let cy = 0 in def ir : RR<opc, (outs RC:$sx), (ins simm7:$sy, RC:$sz),
900 !strconcat(opcStr, " $sx, $sy, $sz")>;
901 let cz = 0 in def rz : RR<opc, (outs RC:$sx), (ins RC:$sy, zero:$sz),
902 !strconcat(opcStr, " $sx, $sy, $sz")>;
904 def iz : RR<opc, (outs RC:$sx), (ins simm7:$sy, zero:$sz),
905 !strconcat(opcStr, " $sx, $sy, $sz")>;
912 def rrr : RR<opc, (outs), (ins RC:$sy, RC:$sz, RC:$sx),
913 !strconcat(opcStr, " $sx, $sy, $sz")>;
914 let cy = 0 in def irr : RR<opc, (outs), (ins simm7:$sy, RC:$sz, RC:$sx),
915 !strconcat(opcStr, " $sx, $sy, $sz")>;
916 let cz = 0 in def rzr : RR<opc, (outs), (ins RC:$sy, zero:$sz, RC:$sx),
917 !strconcat(opcStr, " $sx, $sy, $sz")>;
919 def izr : RR<opc, (outs), (ins simm7:$sy, zero:$sz, RC:$sx),
920 !strconcat(opcStr, " $sx, $sy, $sz")>;
925 def rrr : RR<opc, (outs RC:$sx), (ins RC:$sy, RC:$sz, RC:$sx_in),
926 !strconcat(opcStr, " $sx, $sy, $sz")>;
927 let cy = 0 in def irr : RR<opc, (outs RC:$sx), (ins simm7:$sy, RC:$sz, RC:$sx_in),
928 !strconcat(opcStr, " $sx, $sy, $sz")>;
929 let cz = 0 in def rzr : RR<opc, (outs RC:$sx), (ins RC:$sy, zero:$sz, RC:$sx_in),
930 !strconcat(opcStr, " $sx, $sy, $sz")>;
932 def izr : RR<opc, (outs RC:$sx), (ins simm7:$sy, zero:$sz, RC:$sx_in),
933 !strconcat(opcStr, " $sx, $sy, $sz")>;
941 def ri : RR<opc, (outs RC:$sx), (ins RC:$sy, uimm3:$sz),
942 !strconcat(opcStr, " $sx, $sy, $sz")>;
943 let cy = 0 in def ii : RR<opc, (outs RC:$sx), (ins simm7:$sy, uimm3:$sz),
944 !strconcat(opcStr, " $sx, $sy, $sz")>;
981 def rri : RM<opc, (outs RC:$sx), (ins (MEMrri $sz, $sy, $imm32):$addr),
984 def rii : RM<opc, (outs RC:$sx), (ins (MEMrii $sz, $sy, $imm32):$addr),
987 def zri : RM<opc, (outs RC:$sx), (ins (MEMzri $sz, $sy, $imm32):$addr),
990 def zii : RM<opc, (outs RC:$sx), (ins (MEMzii $sz, $sy, $imm32):$addr),
1017 def rri : RM<opc, (outs RC:$sx), (ins (MEMrri $sz, $sy, $imm32):$addr),
1021 def rii : RM<opc, (outs RC:$sx), (ins (MEMrii $sz, $sy, $imm32):$addr),
1025 def zri : RM<opc, (outs RC:$sx), (ins (MEMzri $sz, $sy, $imm32):$addr),
1029 def zii : RM<opc, (outs RC:$sx), (ins (MEMzii $sz, $sy, $imm32):$addr),
1075 def rri : RM<opc, (outs), (ins (MEMrri $sz, $sy, $imm32):$addr, RC:$sx),
1079 def rii : RM<opc, (outs), (ins (MEMrii $sz, $sy, $imm32):$addr, RC:$sx),
1083 def zri : RM<opc, (outs), (ins (MEMzri $sz, $sy, $imm32):$addr, RC:$sx),
1087 def zii : RM<opc, (outs), (ins (MEMzii $sz, $sy, $imm32):$addr, RC:$sx),
1186 let sx = 0, cy = 0, sy = 0, cz = 0, sz = 0, hasSideEffects = 1 in
1466 let Uses = [SX10], bpf = 3 /* TAKEN */, cond = 15 /* AT */, cy = 0, sy = 0,
1494 let Defs = [SX10], sx = 10 /* SX10 */, cy = 0, sy = 0, imm32 = 0,
1504 let cy = 0, sy = 0, cz = 0, sz = 0, hasSideEffects = 1, Uses = [IC] in
1509 def LPM : RR<0x3a, (outs), (ins I64:$sy), "lpm $sy">;
1512 let cy = 0, sy = 0, cz = 0, sz = 0, hasSideEffects = 1, Uses = [PSW] in
1517 def LFRr : RR<0x69, (outs), (ins I64:$sy), "lfr $sy">;
1518 let cy = 0 in def LFRi : RR<0x69, (outs), (ins uimm6:$sy), "lfr $sy">;
1522 let cy = 0, sy = 0, cz = 0, sz = 0, hasSideEffects = 1, Uses = [PSW] in
1527 def SMIR : RR<0x22, (outs I64:$sx), (ins MISC:$sy), "smir $sx, $sy">;
1531 let sx = 0, cy = 0, sy = 0, cz = 0, sz = 0, hasSideEffects = 0 in
1535 let sx = 0, cy = 0, sy = 0, cz = 0, sz = 0, hasSideEffects = 1 in {
1717 def : Pat<(i64 (anyext i32:$sy)), (i2l $sy)>;