Lines Matching refs:BuildMI
238 BuildMI(&MBB, DL, get(VE::BRCFLa_t)) in insertBranch()
270 BuildMI(&MBB, DL, get(opc[0])) in insertBranch()
276 BuildMI(&MBB, DL, get(opc[1])) in insertBranch()
286 BuildMI(&MBB, DL, get(VE::BRCFLa_t)) in insertBranch()
342 BuildMI(MBB, I, DL, MCID, SubDest).addReg(SubSrc).addImm(0); in copyPhysSubRegs()
347 BuildMI(MBB, I, DL, MCID, SubDest).addReg(VE::VM0).addReg(SubSrc); in copyPhysSubRegs()
365 BuildMI(MBB, I, DL, get(VE::ORri), DestReg) in copyPhysReg()
378 BuildMI(MBB, I, DL, get(VE::LEAzii), TmpReg) in copyPhysReg()
382 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(VE::VORmvl), DestReg) in copyPhysReg()
388 BuildMI(MBB, I, DL, get(VE::ANDMmm), DestReg) in copyPhysReg()
477 BuildMI(MBB, I, DL, get(VE::STrii)) in storeRegToStackSlot()
484 BuildMI(MBB, I, DL, get(VE::STLrii)) in storeRegToStackSlot()
491 BuildMI(MBB, I, DL, get(VE::STUrii)) in storeRegToStackSlot()
498 BuildMI(MBB, I, DL, get(VE::STQrii)) in storeRegToStackSlot()
505 BuildMI(MBB, I, DL, get(VE::STVMrii)) in storeRegToStackSlot()
512 BuildMI(MBB, I, DL, get(VE::STVM512rii)) in storeRegToStackSlot()
539 BuildMI(MBB, I, DL, get(VE::LDrii), DestReg) in loadRegFromStackSlot()
545 BuildMI(MBB, I, DL, get(VE::LDLSXrii), DestReg) in loadRegFromStackSlot()
551 BuildMI(MBB, I, DL, get(VE::LDUrii), DestReg) in loadRegFromStackSlot()
557 BuildMI(MBB, I, DL, get(VE::LDQrii), DestReg) in loadRegFromStackSlot()
563 BuildMI(MBB, I, DL, get(VE::LDVMrii), DestReg) in loadRegFromStackSlot()
569 BuildMI(MBB, I, DL, get(VE::LDVM512rii), DestReg) in loadRegFromStackSlot()
770 BuildMI(FirstMBB, MBBI, dl, get(VE::GETGOT), GlobalBaseReg); in getGlobalBaseReg()
795 BuildMI(*MBB, MI, DL, MCID).addDef(VMXu).addUse(VMYu).addUse(VMZu); in expandPseudoLogM()
796 BuildMI(*MBB, MI, DL, MCID).addDef(VMXl).addUse(VMYl).addUse(VMZl); in expandPseudoLogM()
800 BuildMI(*MBB, MI, DL, MCID).addDef(VMXu).addUse(VMYu); in expandPseudoLogM()
801 BuildMI(*MBB, MI, DL, MCID).addDef(VMXl).addUse(VMYl); in expandPseudoLogM()
868 MachineInstrBuilder Bu = BuildMI(*MBB, MI, DL, TI.get(OpcodeUpper)); in expandPseudoVFMK()
870 MachineInstrBuilder Bl = BuildMI(*MBB, MI, DL, TI.get(OpcodeLower)); in expandPseudoVFMK()
929 BuildMI(*MBB, MI, DL, get(VE::LVMir)) in expandPostRAPseudo()
935 BuildMI(*MBB, MI, DL, get(VE::LVMim)) in expandPostRAPseudo()
943 BuildMI(*MBB, MI, DL, get(VE::LVMir_m)) in expandPostRAPseudo()
952 BuildMI(*MBB, MI, DL, get(VE::LVMim_m)) in expandPostRAPseudo()
976 BuildMI(*MBB, MI, DL, get(VE::SVMmi), Dest).addReg(VMZ).addImm(Imm); in expandPostRAPseudo()
1037 BuildMI(BB, dl, TII.get(VE::BRCFLrr_t)) in expandExtendStackPseudo()
1048 BuildMI(BB, dl, TII.get(VE::LDrii), VE::SX61) in expandExtendStackPseudo()
1052 BuildMI(BB, dl, TII.get(VE::ORri), VE::SX62) in expandExtendStackPseudo()
1055 BuildMI(BB, dl, TII.get(VE::LEAzii), VE::SX63) in expandExtendStackPseudo()
1059 BuildMI(BB, dl, TII.get(VE::SHMLri)) in expandExtendStackPseudo()
1063 BuildMI(BB, dl, TII.get(VE::SHMLri)) in expandExtendStackPseudo()
1067 BuildMI(BB, dl, TII.get(VE::SHMLri)) in expandExtendStackPseudo()
1071 BuildMI(BB, dl, TII.get(VE::MONC)); in expandExtendStackPseudo()
1073 BuildMI(BB, dl, TII.get(VE::ORri), VE::SX0) in expandExtendStackPseudo()
1103 BuildMI(*MBB, MI, DL, TII.get(VE::LEArii)) in expandGetStackTopPseudo()