Lines Matching refs:Tmp2
2030 Register Tmp2 = MRI.createVirtualRegister(RC); in prepareMBB() local
2042 BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2) in prepareMBB()
2047 .addReg(Tmp2, getKillRegState(true)) in prepareMBB()
2058 BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2) in prepareMBB()
2062 .addReg(Tmp2, getKillRegState(true)) in prepareMBB()
2094 Register Tmp2 = MRI.createVirtualRegister(RC); in prepareSymbol() local
2103 BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2) in prepareSymbol()
2108 .addReg(Tmp2, getKillRegState(true)) in prepareSymbol()
2112 Register Tmp2 = MRI.createVirtualRegister(RC); in prepareSymbol() local
2123 BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2) in prepareSymbol()
2128 .addReg(Tmp2, getKillRegState(true)) in prepareSymbol()
2137 Register Tmp2 = MRI.createVirtualRegister(RC); in prepareSymbol() local
2146 BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2) in prepareSymbol()
2150 .addReg(Tmp2, getKillRegState(true)) in prepareSymbol()
2523 Register Tmp2 = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
2534 BuildMI(DispContBB, DL, TII->get(VE::ANDrm), Tmp2) in emitSjLjDispatchBlock()
2539 .addReg(Tmp2, getKillRegState(true)) in emitSjLjDispatchBlock()
2550 BuildMI(DispContBB, DL, TII->get(VE::ANDrm), Tmp2) in emitSjLjDispatchBlock()
2554 .addReg(Tmp2, getKillRegState(true)) in emitSjLjDispatchBlock()