Lines Matching +full:standard +full:- +full:vt

1 //===------------ VECustomDAG.h - VE Custom DAG Nodes -----------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
30 MVT splitVectorType(MVT VT);
46 /// The VE backend uses a two-staged process to lower and legalize vector
49 /// 1. VP and standard vector SDNodes are lowered to SDNodes of the VVP_* layer.
62 //     legalized since each element occupies a 64bit chunk - there is no
69 //     demands - that is, the wrapped AVL is the correct setting for the VL
120   Normal = 0, // 256 element standard mode.
160       N->setFlags(*Flags);
168       N->setFlags(*Flags);
176       N->setFlags(*Flags);
180   SDValue getUNDEF(EVT VT) const { return DAG.getUNDEF(VT); }  in getUNDEF()  argument
198   SDValue getConstant(uint64_t Val, EVT VT, bool IsTarget = false,