Lines Matching refs:VE
88 SICInst.setOpcode(VE::SIC); in emitSIC()
96 BSICInst.setOpcode(VE::BSICrii); in emitBSIC()
108 LEAInst.setOpcode(VE::LEAzii); in emitLEAzzi()
120 LEASLInst.setOpcode(VE::LEASLzii); in emitLEASLzzi()
132 LEAInst.setOpcode(VE::LEAzii); in emitLEAzii()
145 LEASLInst.setOpcode(VE::LEASLrri); in emitLEASLrri()
166 emitBinary(OutStreamer, VE::ANDrm, RS1, Imm, RD, STI); in emitANDrm()
205 MCOperand RegGOT = MCOperand::createReg(VE::SX15); // GOT in lowerGETGOTAndEmitMCInsts()
206 MCOperand RegPLT = MCOperand::createReg(VE::SX16); // PLT in lowerGETGOTAndEmitMCInsts()
254 MCOperand RegPLT = MCOperand::createReg(VE::SX16); // PLT in lowerGETFunPLTAndEmitMCInsts()
295 MCOperand RegLR = MCOperand::createReg(VE::SX10); // LR in lowerGETTLSAddrAndEmitMCInsts()
296 MCOperand RegS0 = MCOperand::createReg(VE::SX0); // S0 in lowerGETTLSAddrAndEmitMCInsts()
297 MCOperand RegS12 = MCOperand::createReg(VE::SX12); // S12 in lowerGETTLSAddrAndEmitMCInsts()
339 case VE::GETGOT: in emitInstruction()
342 case VE::GETFUNPLT: in emitInstruction()
345 case VE::GETTLSADDR: in emitInstruction()