Lines Matching +full:0 +full:x8200
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
22 def EPSW : InherentDualRRE<"epsw", 0xB98D, GR32>;
26 def LPSW : SideEffectUnaryS<"lpsw", 0x8200, null_frag, 8>;
27 def LPSWE : SideEffectUnaryS<"lpswe", 0xB2B2, null_frag, 16>;
30 def LPSWEY : SideEffectUnarySIY<"lpswey", 0xEB71, 16>;
34 def IPK : SideEffectInherentS<"ipk", 0xB20B, null_frag>;
38 def SPKA : SideEffectAddressS<"spka", 0xB20A, null_frag>;
42 def SSM : SideEffectUnaryS<"ssm", 0x8000, null_frag, 1>;
46 def STNSM : StoreSI<"stnsm", 0xAC, null_frag, imm32zx8>;
47 def STOSM : StoreSI<"stosm", 0xAD, null_frag, imm32zx8>;
52 def IAC : InherentRRE<"iac", 0xB224, GR32, null_frag>;
56 def SAC : SideEffectAddressS<"sac", 0xB219, null_frag>;
57 def SACF : SideEffectAddressS<"sacf", 0xB279, null_frag>;
66 def LCTL : LoadMultipleRS<"lctl", 0xB7, CR64>;
67 def LCTLG : LoadMultipleRSY<"lctlg", 0xEB2F, CR64>;
70 def STCTL : StoreMultipleRS<"stctl", 0xB6, CR64>;
71 def STCTG : StoreMultipleRSY<"stctg", 0xEB25, CR64>;
76 def EPAR : InherentRRE<"epar", 0xB226, GR32, null_frag>;
77 def EPAIR : InherentRRE<"epair", 0xB99A, GR64, null_frag>;
82 def ESAR : InherentRRE<"esar", 0xB227, GR32, null_frag>;
83 def ESAIR : InherentRRE<"esair", 0xB99B, GR64, null_frag>;
88 def SSAR : SideEffectUnaryRRE<"ssar", 0xB225, GR32, null_frag>;
89 def SSAIR : SideEffectUnaryRRE<"ssair", 0xB99F, GR64, null_frag>;
94 def ESEA : UnaryTiedRRE<"esea", 0xB99D, GR32>;
102 def SPX : SideEffectUnaryS<"spx", 0xB210, null_frag, 4>;
106 def STPX : StoreInherentS<"stpx", 0xB211, null_frag, 4>;
115 def LBEAR : SideEffectUnaryS<"lbear", 0xB200, null_frag, 8>;
119 def STBEAR : StoreInherentS<"stbear", 0xB201, null_frag, 8>;
128 def ISKE : BinaryRRE<"iske", 0xB229, null_frag, GR32, GR64>;
132 def IVSK : BinaryRRE<"ivsk", 0xB223, null_frag, GR32, GR64>;
136 defm SSKE : SideEffectTernaryRRFcOpt<"sske", 0xB22B, GR32, GR64>;
140 def RRBE : SideEffectBinaryRRE<"rrbe", 0xB22A, GR32, GR64>;
144 def RRBM : UnaryRRE<"rrbm", 0xB9AE, null_frag, GR64, GR64>;
148 def IRBM : UnaryRRE<"irbm", 0xB9AC, null_frag, GR64, GR64>;
152 def PFMF : SideEffectBinaryMemRRE<"pfmf", 0xB9AF, GR32, GR64>;
156 def TB : SideEffectBinaryRRE<"tb", 0xB22C, GR64, GR64>;
160 def PGIN : SideEffectBinaryRRE<"pgin", 0xB22E, GR64, GR64>;
161 def PGOUT : SideEffectBinaryRRE<"pgout", 0xB22F, GR64, GR64>;
170 defm IPTE : SideEffectQuaternaryRRFaOptOpt<"ipte", 0xB221, GR64, GR32, GR32>;
174 defm IDTE : SideEffectQuaternaryRRFbOpt<"idte", 0xB98E, GR64, GR64, GR64>;
178 defm RDP : SideEffectQuaternaryRRFbOpt<"rdp", 0xB98B, GR64, GR64, GR64>;
182 defm CRDTE : SideEffectQuaternaryRRFbOpt<"crdte", 0xB98F, GR128, GR128, GR64>;
186 def PTLB : SideEffectInherentS<"ptlb", 0xB20D, null_frag>;
190 def CSP : CmpSwapRRE<"csp", 0xB250, GR128, GR64>;
191 def CSPG : CmpSwapRRE<"cspg", 0xB98A, GR128, GR64>;
196 def LPTEA : TernaryRRFb<"lptea", 0xB9AA, GR64, GR64, GR64>;
200 defm LRA : LoadAddressRXPair<"lra", 0xB1, 0xE313, null_frag>;
201 def LRAG : LoadAddressRXY<"lrag", 0xE303, null_frag, laaddr20pair>;
205 def STRAG : StoreSSE<"strag", 0xE502>;
209 def LURA : UnaryRRE<"lura", 0xB24B, null_frag, GR32, GR64>;
210 def LURAG : UnaryRRE<"lurag", 0xB905, null_frag, GR64, GR64>;
215 def STURA : SideEffectBinaryRRE<"stura", 0xB246, GR32, GR64>;
216 def STURG : SideEffectBinaryRRE<"sturg", 0xB925, GR64, GR64>;
221 def TPROT : SideEffectBinarySSE<"tprot", 0xE501>;
229 def MVCK : MemoryBinarySSd<"mvck", 0xD9, GR64>;
233 def MVCP : MemoryBinarySSd<"mvcp", 0xDA, GR64>;
234 def MVCS : MemoryBinarySSd<"mvcs", 0xDB, GR64>;
239 def MVCSK : SideEffectBinarySSE<"mvcsk", 0xE50E>;
240 def MVCDK : SideEffectBinarySSE<"mvcdk", 0xE50F>;
245 def MVCOS : SideEffectTernarySSF<"mvcos", 0xC80, GR64>;
249 def MVPG : SideEffectBinaryRRE<"mvpg", 0xB254, GR64, GR64>;
257 def LASP : SideEffectBinarySSE<"lasp", 0xE500>;
261 def PALB : SideEffectInherentRRE<"palb", 0xB248>;
265 def PC : SideEffectAddressS<"pc", 0xB218, null_frag>;
269 def PR : SideEffectInherentE<"pr", 0x0101>;
273 def PT : SideEffectBinaryRRE<"pt", 0xB228, GR32, GR64>;
274 def PTI : SideEffectBinaryRRE<"pti", 0xB99E, GR64, GR64>;
279 def RP : SideEffectAddressS<"rp", 0xB277, null_frag>;
283 def BSG : UnaryRRE<"bsg", 0xB258, null_frag, GR64, GR64>;
287 def BSA : UnaryRRE<"bsa", 0xB25A, null_frag, GR64, GR64>;
291 def TAR : SideEffectBinaryRRE<"tar", 0xB24C, AR32, GR32>;
299 def BAKR : SideEffectBinaryRRE<"bakr", 0xB240, GR64, GR64>;
303 def EREG : SideEffectBinaryRRE<"ereg", 0xB249, GR32, GR32>;
304 def EREGG : SideEffectBinaryRRE<"eregg", 0xB90E, GR64, GR64>;
309 def ESTA : UnaryRRE<"esta", 0xB24A, null_frag, GR128, GR32>;
313 def MSTA : SideEffectUnaryRRE<"msta", 0xB247, GR128, null_frag>;
321 def PTFF : SideEffectInherentE<"ptff", 0x0104>;
325 def SCK : SideEffectUnaryS<"sck", 0xB204, null_frag, 8>;
329 def SCKPF : SideEffectInherentE<"sckpf", 0x0107>;
333 def SCKC : SideEffectUnaryS<"sckc", 0xB206, null_frag, 8>;
337 def SPT : SideEffectUnaryS<"spt", 0xB208, null_frag, 8>;
341 def STCK : StoreInherentS<"stck", 0xB205, null_frag, 8>;
342 def STCKF : StoreInherentS<"stckf", 0xB27C, z_stckf, 8>;
343 def STCKE : StoreInherentS<"stcke", 0xB278, null_frag, 16>;
348 def STCKC : StoreInherentS<"stckc", 0xB207, null_frag, 8>;
352 def STPT : StoreInherentS<"stpt", 0xB209, null_frag, 8>;
360 def STAP : StoreInherentS<"stap", 0xB212, null_frag, 2>;
364 def STIDP : StoreInherentS<"stidp", 0xB202, null_frag, 8>;
368 def STSI : StoreInherentS<"stsi", 0xB27D, null_frag, 0>;
372 def STFL : StoreInherentS<"stfl", 0xB2B1, null_frag, 4>;
376 def STFLE : StoreInherentS<"stfle", 0xB2B0, null_frag, 0>;
380 def ECAG : BinaryRSY<"ecag", 0xEB4C, null_frag, GR64>;
384 def ECTG : SideEffectTernarySSF<"ectg", 0xC81, GR64>;
388 def PTF : UnaryTiedRRE<"ptf", 0xB9A2, GR64>;
393 def PCKMO : SideEffectInherentRRE<"pckmo", 0xB928>;
398 def QPACI : StoreInherentS<"qpaci", 0xB28F, null_frag, 0>;
406 def SVC : SideEffectUnaryI<"svc", 0x0A, imm32zx8>;
410 def MC : SideEffectBinarySI<"mc", 0xAF, imm32zx8>;
414 def DIAG : SideEffectTernaryRS<"diag", 0x83, GR32, GR32>;
418 def TRACE : SideEffectTernaryRS<"trace", 0x99, GR32, GR32>;
419 def TRACG : SideEffectTernaryRSY<"tracg", 0xEB0F, GR64, GR64>;
424 def TRAP2 : SideEffectInherentE<"trap2", 0x01FF>;
425 def TRAP4 : SideEffectAddressS<"trap4", 0xB2FF, null_frag>;
430 def SIGP : SideEffectTernaryRS<"sigp", 0xAE, GR64, GR64>;
434 def SIGA : SideEffectAddressS<"siga", 0xB274, null_frag>;
438 def SIE : SideEffectUnaryS<"sie", 0xB214, null_frag, 0>;
446 def LPP : SideEffectUnaryS<"lpp", 0xB280, null_frag, 8>;
450 def ECPGA : UnaryRRE<"ecpga", 0xB2ED, null_frag, GR32, GR64>;
454 def ECCTR : UnaryRRE<"ecctr", 0xB2E4, null_frag, GR64, GR64>;
458 def EPCTR : UnaryRRE<"epctr", 0xB2E5, null_frag, GR64, GR64>;
462 def LCCTL : SideEffectUnaryS<"lcctl", 0xB284, null_frag, 8>;
466 def LPCTL : SideEffectUnaryS<"lpctl", 0xB285, null_frag, 8>;
470 def LSCTL : SideEffectUnaryS<"lsctl", 0xB287, null_frag, 0>;
474 def QSI : StoreInherentS<"qsi", 0xB286, null_frag, 0>;
478 def QCTRI : StoreInherentS<"qctri", 0xB28E, null_frag, 0>;
482 def SCCTR : SideEffectBinaryRRE<"scctr", 0xB2E0, GR64, GR64>;
486 def SPCTR : SideEffectBinaryRRE<"spctr", 0xB2E1, GR64, GR64>;
494 def CSCH : SideEffectInherentS<"csch", 0xB230, null_frag>;
498 def HSCH : SideEffectInherentS<"hsch", 0xB231, null_frag>;
502 def MSCH : SideEffectUnaryS<"msch", 0xB232, null_frag, 0>;
506 def RSCH : SideEffectInherentS<"rsch", 0xB238, null_frag>;
510 def SSCH : SideEffectUnaryS<"ssch", 0xB233, null_frag, 0>;
514 def STSCH : StoreInherentS<"stsch", 0xB234, null_frag, 0>;
518 def TSCH : StoreInherentS<"tsch", 0xB235, null_frag, 0>;
522 def XSCH : SideEffectInherentS<"xsch", 0xB276, null_frag>;
526 def RCHP : SideEffectInherentS<"rchp", 0xB23B, null_frag>;
530 def SCHM : SideEffectInherentS<"schm", 0xB23C, null_frag>;
534 def STCPS : StoreInherentS<"stcps", 0xB23A, null_frag, 0>;
538 def STCRW : StoreInherentS<"stcrw", 0xB239, null_frag, 0>;
542 def TPI : StoreInherentS<"tpi", 0xB236, null_frag, 0>;
546 def TPEI : UnaryRRE<"tpei", 0xB9A1, null_frag, GR64, GR64>;
550 def SAL : SideEffectInherentS<"sal", 0xB237, null_frag>;