Lines Matching +full:0 +full:xc01
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
60 def BRC : CondBranchRI <"j#", 0xA74, z_br_ccmask>;
63 def BRCL : CondBranchRIL<"jg#", 0xC04>;
65 def BC : CondBranchRX<"b#", 0x47>;
66 def BCR : CondBranchRR<"b#r", 0x07>;
67 def BIC : CondBranchRXY<"bi#", 0xe347>,
74 def BRCAsm : AsmCondBranchRI <"brc", 0xA74>;
75 def BRCLAsm : AsmCondBranchRIL<"brcl", 0xC04>;
77 def BCAsm : AsmCondBranchRX<"bc", 0x47>;
78 def BCRAsm : AsmCondBranchRR<"bcr", 0x07>;
79 def BICAsm : AsmCondBranchRXY<"bic", 0xe347>,
87 def JAsm#V : FixedCondBranchRI <CV<V>, "j#", 0xA74>;
88 def JGAsm#V : FixedCondBranchRIL<CV<V>, "j{g|l}#", 0xC04>;
90 def BAsm#V : FixedCondBranchRX <CV<V>, "b#", 0x47>;
91 def BRAsm#V : FixedCondBranchRR <CV<V>, "b#r", 0x07>;
92 def BIAsm#V : FixedCondBranchRXY<CV<V>, "bi#", 0xe347>,
101 def J : FixedCondBranchRI <CondAlways, "j", 0xA74, br>;
102 def JG : FixedCondBranchRIL<CondAlways, "j{g|lu}", 0xC04>;
104 def B : FixedCondBranchRX<CondAlways, "b", 0x47>;
105 def BR : FixedCondBranchRR<CondAlways, "br", 0x07, brind>;
106 def BI : FixedCondBranchRXY<CondAlways, "bi", 0xe347, brind>,
114 def NOP : NeverCondBranchRX<"nop", 0x47>;
115 let isAsmParserOnly = 1, hasNoSchedulingInfo = 1, M1 = 0, X2 = 0, B2 = 0, D2 = 0 in
116 def NOP_bare : InstRXb<0x47,(outs), (ins), "nop", []>;
117 def NOPR : NeverCondBranchRR<"nopr", 0x07>;
118 def NOPR_bare : InstAlias<"nopr", (NOPR R0D), 0>;
120 // An alias of BRC 0, label
121 def JNOP : InstAlias<"jnop\t$RI2", (BRCAsm 0, brtarget16:$RI2), 0>;
123 // An alias of BRCL 0, label
125 def JGNOP : InstAlias<"{jgnop|jlnop}\t$RI2", (BRCLAsm 0, brtarget32:$RI2), 0>;
138 defm CRJ : CmpBranchRIEbPair<"crj", 0xEC76, GR32>;
139 defm CGRJ : CmpBranchRIEbPair<"cgrj", 0xEC64, GR64>;
140 defm CIJ : CmpBranchRIEcPair<"cij", 0xEC7E, GR32, imm32sx8>;
141 defm CGIJ : CmpBranchRIEcPair<"cgij", 0xEC7C, GR64, imm64sx8>;
142 defm CLRJ : CmpBranchRIEbPair<"clrj", 0xEC77, GR32>;
143 defm CLGRJ : CmpBranchRIEbPair<"clgrj", 0xEC65, GR64>;
144 defm CLIJ : CmpBranchRIEcPair<"clij", 0xEC7F, GR32, imm32zx8>;
145 defm CLGIJ : CmpBranchRIEcPair<"clgij", 0xEC7D, GR64, imm64zx8>;
148 defm CRB : CmpBranchRRSPair<"crb", 0xECF6, GR32>;
149 defm CGRB : CmpBranchRRSPair<"cgrb", 0xECE4, GR64>;
150 defm CIB : CmpBranchRISPair<"cib", 0xECFE, GR32, imm32sx8>;
151 defm CGIB : CmpBranchRISPair<"cgib", 0xECFC, GR64, imm64sx8>;
152 defm CLRB : CmpBranchRRSPair<"clrb", 0xECF7, GR32>;
153 defm CLGRB : CmpBranchRRSPair<"clgrb", 0xECE5, GR64>;
154 defm CLIB : CmpBranchRISPair<"clib", 0xECFF, GR32, imm32zx8>;
155 defm CLGIB : CmpBranchRISPair<"clgib", 0xECFD, GR64, imm64zx8>;
162 def CRJAsm#V : FixedCmpBranchRIEb<ICV<V>, "crj", 0xEC76, GR32>;
163 def CGRJAsm#V : FixedCmpBranchRIEb<ICV<V>, "cgrj", 0xEC64, GR64>;
164 def CIJAsm#V : FixedCmpBranchRIEc<ICV<V>, "cij", 0xEC7E, GR32,
166 def CGIJAsm#V : FixedCmpBranchRIEc<ICV<V>, "cgij", 0xEC7C, GR64,
168 def CLRJAsm#V : FixedCmpBranchRIEb<ICV<V>, "clrj", 0xEC77, GR32>;
169 def CLGRJAsm#V : FixedCmpBranchRIEb<ICV<V>, "clgrj", 0xEC65, GR64>;
170 def CLIJAsm#V : FixedCmpBranchRIEc<ICV<V>, "clij", 0xEC7F, GR32,
172 def CLGIJAsm#V : FixedCmpBranchRIEc<ICV<V>, "clgij", 0xEC7D, GR64,
176 def CRBAsm#V : FixedCmpBranchRRS<ICV<V>, "crb", 0xECF6, GR32>;
177 def CGRBAsm#V : FixedCmpBranchRRS<ICV<V>, "cgrb", 0xECE4, GR64>;
178 def CIBAsm#V : FixedCmpBranchRIS<ICV<V>, "cib", 0xECFE, GR32,
180 def CGIBAsm#V : FixedCmpBranchRIS<ICV<V>, "cgib", 0xECFC, GR64,
182 def CLRBAsm#V : FixedCmpBranchRRS<ICV<V>, "clrb", 0xECF7, GR32>;
183 def CLGRBAsm#V : FixedCmpBranchRRS<ICV<V>, "clgrb", 0xECE5, GR64>;
184 def CLIBAsm#V : FixedCmpBranchRIS<ICV<V>, "clib", 0xECFF, GR32,
186 def CLGIBAsm#V : FixedCmpBranchRIS<ICV<V>, "clgib", 0xECFD, GR64,
196 def BRCT : BranchUnaryRI<"brct", 0xA76, GR32>;
197 def BRCTG : BranchUnaryRI<"brctg", 0xA77, GR64>;
200 def BRCTH : BranchUnaryRIL<"brcth", 0xCC6, GRH32>,
203 def BCT : BranchUnaryRX<"bct", 0x46,GR32>;
204 def BCTR : BranchUnaryRR<"bctr", 0x06, GR32>;
205 def BCTG : BranchUnaryRXY<"bctg", 0xE346, GR64>;
206 def BCTGR : BranchUnaryRRE<"bctgr", 0xB946, GR64>;
211 def BRXH : BranchBinaryRSI<"brxh", 0x84, GR32>;
212 def BRXLE : BranchBinaryRSI<"brxle", 0x85, GR32>;
213 def BRXHG : BranchBinaryRIEe<"brxhg", 0xEC44, GR64>;
214 def BRXLG : BranchBinaryRIEe<"brxlg", 0xEC45, GR64>;
216 def BXH : BranchBinaryRS<"bxh", 0x86, GR32>;
217 def BXLE : BranchBinaryRS<"bxle", 0x87, GR32>;
218 def BXHG : BranchBinaryRSY<"bxhg", 0xEB44, GR64>;
219 def BXLEG : BranchBinaryRSY<"bxleg", 0xEB45, GR64>;
237 defm CRT : CmpBranchRRFcPair<"crt", 0xB972, GR32>;
238 defm CGRT : CmpBranchRRFcPair<"cgrt", 0xB960, GR64>;
239 defm CLRT : CmpBranchRRFcPair<"clrt", 0xB973, GR32>;
240 defm CLGRT : CmpBranchRRFcPair<"clgrt", 0xB961, GR64>;
241 defm CIT : CmpBranchRIEaPair<"cit", 0xEC72, GR32, imm32sx16>;
242 defm CGIT : CmpBranchRIEaPair<"cgit", 0xEC70, GR64, imm64sx16>;
243 defm CLFIT : CmpBranchRIEaPair<"clfit", 0xEC73, GR32, imm32zx16>;
244 defm CLGIT : CmpBranchRIEaPair<"clgit", 0xEC71, GR64, imm64zx16>;
246 defm CLT : CmpBranchRSYbPair<"clt", 0xEB23, GR32>;
247 defm CLGT : CmpBranchRSYbPair<"clgt", 0xEB2B, GR64>;
252 def CRTAsm#V : FixedCmpBranchRRFc<ICV<V>, "crt", 0xB972, GR32>;
253 def CGRTAsm#V : FixedCmpBranchRRFc<ICV<V>, "cgrt", 0xB960, GR64>;
254 def CLRTAsm#V : FixedCmpBranchRRFc<ICV<V>, "clrt", 0xB973, GR32>;
255 def CLGRTAsm#V : FixedCmpBranchRRFc<ICV<V>, "clgrt", 0xB961, GR64>;
256 def CITAsm#V : FixedCmpBranchRIEa<ICV<V>, "cit", 0xEC72, GR32,
258 def CGITAsm#V : FixedCmpBranchRIEa<ICV<V>, "cgit", 0xEC70, GR64,
260 def CLFITAsm#V : FixedCmpBranchRIEa<ICV<V>, "clfit", 0xEC73, GR32,
262 def CLGITAsm#V : FixedCmpBranchRIEa<ICV<V>, "clgit", 0xEC71, GR64,
265 def CLTAsm#V : FixedCmpBranchRSYb<ICV<V>, "clt", 0xEB23, GR32>;
266 def CLGTAsm#V : FixedCmpBranchRSYb<ICV<V>, "clgt", 0xEB2B, GR64>;
278 def BRAS : CallRI <"bras", 0xA75>;
279 def BRASL : CallRIL<"brasl", 0xC05>;
280 def BAS : CallRX <"bas", 0x4D>;
281 def BASR : CallRR <"basr", 0x0D>;
436 def LR : UnaryRR <"lr", 0x18, null_frag, GR32, GR32>;
437 def LGR : UnaryRRE<"lgr", 0xB904, null_frag, GR64, GR64>;
439 let Defs = [CC], CCValues = 0xE, CompareZeroCCMask = 0xE in {
440 def LTR : UnaryRR <"ltr", 0x12, null_frag, GR32, GR32>;
441 def LTGR : UnaryRRE<"ltgr", 0xB902, null_frag, GR64, GR64>;
453 def LHI : UnaryRI<"lhi", 0xA78, bitconvert, GR32, imm32sx16>;
454 def LGHI : UnaryRI<"lghi", 0xA79, bitconvert, GR64, imm64sx16>;
457 def LLILL : UnaryRI<"llill", 0xA5F, bitconvert, GR64, imm64ll16>;
458 def LLILH : UnaryRI<"llilh", 0xA5E, bitconvert, GR64, imm64lh16>;
459 def LLIHL : UnaryRI<"llihl", 0xA5D, bitconvert, GR64, imm64hl16>;
460 def LLIHH : UnaryRI<"llihh", 0xA5C, bitconvert, GR64, imm64hh16>;
463 def LGFI : UnaryRIL<"lgfi", 0xC01, bitconvert, GR64, imm64sx32>;
464 def LLILF : UnaryRIL<"llilf", 0xC0F, bitconvert, GR64, imm64lf32>;
465 def LLIHF : UnaryRIL<"llihf", 0xC0E, bitconvert, GR64, imm64hf32>;
475 defm L : UnaryRXPair<"l", 0x58, 0xE358, z_load, GR32, 4>;
476 def LFH : UnaryRXY<"lfh", 0xE3CA, z_load, GRH32, 4>,
478 def LG : UnaryRXY<"lg", 0xE304, z_load, GR64, 8>;
487 let Defs = [CC], CCValues = 0xE, CompareZeroCCMask = 0xE in {
488 def LT : UnaryRXY<"lt", 0xE312, z_load, GR32, 4>;
489 def LTG : UnaryRXY<"ltg", 0xE302, z_load, GR64, 8>;
493 def LRL : UnaryRILPC<"lrl", 0xC4D, aligned_z_load, GR32>;
494 def LGRL : UnaryRILPC<"lgrl", 0xC48, aligned_z_load, GR64>;
499 def LZRF : UnaryRXY<"lzrf", 0xE33B, null_frag, GR32, 4>;
500 def LZRG : UnaryRXY<"lzrg", 0xE32A, null_frag, GR64, 8>;
501 def : Pat<(and (i32 (z_load bdxaddr20only:$src)), 0xffffff00),
503 def : Pat<(and (i64 (z_load bdxaddr20only:$src)), 0xffffffffffffff00),
509 def LAT : UnaryRXY<"lat", 0xE39F, null_frag, GR32, 4>;
510 def LFHAT : UnaryRXY<"lfhat", 0xE3C8, null_frag, GRH32, 4>;
511 def LGAT : UnaryRXY<"lgat", 0xE385, null_frag, GR64, 8>;
519 defm ST : StoreRXPair<"st", 0x50, 0xE350, store, GR32, 4>;
520 def STFH : StoreRXY<"stfh", 0xE3CB, store, GRH32, 4>,
522 def STG : StoreRXY<"stg", 0xE324, store, GR64, 8>;
531 def STRL : StoreRILPC<"strl", 0xC4F, aligned_store, GR32>;
532 def STGRL : StoreRILPC<"stgrl", 0xC4B, aligned_store, GR64>;
535 defm MVI : StoreSIPair<"mvi", 0x92, 0xEB52, truncstorei8, imm32zx8trunc>;
538 def MVHHI : StoreSIL<"mvhhi", 0xE544, truncstorei16, imm32sx16trunc>;
539 def MVHI : StoreSIL<"mvhi", 0xE54C, store, imm32sx16>;
540 def MVGHI : StoreSIL<"mvghi", 0xE548, store, imm64sx16>;
544 defm MVC : MemorySS<"mvc", 0xD2, z_mvc>;
546 def MVCL : SideEffectBinaryMemMemRR<"mvcl", 0x0E, GR128, GR128>;
547 def MVCLE : SideEffectTernaryMemMemRS<"mvcle", 0xA8, GR128, GR128>;
548 def MVCLU : SideEffectTernaryMemMemRSY<"mvclu", 0xEB8E, GR128, GR128>;
560 def MVCRL : SideEffectBinarySSE<"mvcrl", 0xE50A>;
564 defm MVST : StringRRE<"mvst", 0xB255, z_stpcpy>;
576 defm SELFHR : CondBinaryRRFaPair<"selfhr", 0xB9C0, GRH32, GRH32, GRH32>;
577 defm SELR : CondBinaryRRFaPair<"selr", 0xB9F0, GR32, GR32, GR32>;
578 defm SELGR : CondBinaryRRFaPair<"selgr", 0xB9E3, GR64, GR64, GR64>;
584 def SELRAsm#V : FixedCondBinaryRRFa<CV<V>, "selr", 0xB9F0,
586 def SELFHRAsm#V : FixedCondBinaryRRFa<CV<V>, "selfhr", 0xB9C0,
588 def SELGRAsm#V : FixedCondBinaryRRFa<CV<V>, "selgr", 0xB9E3,
599 defm LOCHHI : CondBinaryRIEPair<"lochhi", 0xEC4E, GRH32, imm32sx16>;
600 defm LOCHI : CondBinaryRIEPair<"lochi", 0xEC42, GR32, imm32sx16>;
601 defm LOCGHI : CondBinaryRIEPair<"locghi", 0xEC46, GR64, imm64sx16>;
609 defm LOCFHR : CondBinaryRRFPair<"locfhr", 0xB9E0, GRH32, GRH32>;
615 defm LOCFH : CondUnaryRSYPair<"locfh", 0xEBE0, simple_load, GRH32, 4>;
620 defm STOCFH : CondStoreRSYPair<"stocfh", 0xEBE1, GRH32, 4>;
625 def LOCHIAsm#V : FixedCondBinaryRIE<CV<V>, "lochi", 0xEC42, GR32,
627 def LOCGHIAsm#V : FixedCondBinaryRIE<CV<V>, "locghi", 0xEC46, GR64,
629 def LOCHHIAsm#V : FixedCondBinaryRIE<CV<V>, "lochhi", 0xEC4E, GRH32,
631 def LOCFHRAsm#V : FixedCondBinaryRRF<CV<V>, "locfhr", 0xB9E0, GRH32, GRH32>;
632 def LOCFHAsm#V : FixedCondUnaryRSY<CV<V>, "locfh", 0xEBE0, GRH32, 4>;
633 def STOCFHAsm#V : FixedCondStoreRSY<CV<V>, "stocfh", 0xEBE1, GRH32, 4>;
641 defm LOCR : CondBinaryRRFPair<"locr", 0xB9F2, GR32, GR32>;
642 defm LOCGR : CondBinaryRRFPair<"locgr", 0xB9E2, GR64, GR64>;
646 defm LOC : CondUnaryRSYPair<"loc", 0xEBF2, simple_load, GR32, 4>;
647 defm LOCG : CondUnaryRSYPairAndMemFold<"locg", 0xEBE2, simple_load, GR64, 8>;
650 defm STOC : CondStoreRSYPair<"stoc", 0xEBF3, GR32, 4>;
651 defm STOCG : CondStoreRSYPair<"stocg", 0xEBE3, GR64, 8>;
656 def LOCRAsm#V : FixedCondBinaryRRF<CV<V>, "locr", 0xB9F2, GR32, GR32>;
657 def LOCGRAsm#V : FixedCondBinaryRRF<CV<V>, "locgr", 0xB9E2, GR64, GR64>;
658 def LOCAsm#V : FixedCondUnaryRSY<CV<V>, "loc", 0xEBF2, GR32, 4>;
659 def LOCGAsm#V : FixedCondUnaryRSY<CV<V>, "locg", 0xEBE2, GR64, 8>;
660 def STOCAsm#V : FixedCondStoreRSY<CV<V>, "stoc", 0xEBF3, GR32, 4>;
661 def STOCGAsm#V : FixedCondStoreRSY<CV<V>, "stocg", 0xEBE3, GR64, 8>;
676 def LBR : UnaryRRE<"lbr", 0xB926, sext8, GR32, GR32>;
677 def LHR : UnaryRRE<"lhr", 0xB927, sext16, GR32, GR32>;
680 def LGBR : UnaryRRE<"lgbr", 0xB906, sext8, GR64, GR64>;
681 def LGHR : UnaryRRE<"lghr", 0xB907, sext16, GR64, GR64>;
682 def LGFR : UnaryRRE<"lgfr", 0xB914, sext32, GR64, GR32>;
684 let Defs = [CC], CCValues = 0xE, CompareZeroCCMask = 0xE in
685 def LTGFR : UnaryRRE<"ltgfr", 0xB912, null_frag, GR64, GR32>;
696 def LB : UnaryRXY<"lb", 0xE376, z_asextloadi8, GR32, 1>;
697 def LBH : UnaryRXY<"lbh", 0xE3C0, z_asextloadi8, GRH32, 1>,
704 defm LH : UnaryRXPair<"lh", 0x48, 0xE378, z_asextloadi16, GR32, 2>;
705 def LHH : UnaryRXY<"lhh", 0xE3C4, z_asextloadi16, GRH32, 2>,
707 def LHRL : UnaryRILPC<"lhrl", 0xC45, aligned_z_asextloadi16, GR32>;
710 def LGB : UnaryRXY<"lgb", 0xE377, z_asextloadi8, GR64, 1>;
711 def LGH : UnaryRXY<"lgh", 0xE315, z_asextloadi16, GR64, 2>;
712 def LGF : UnaryRXY<"lgf", 0xE314, z_asextloadi32, GR64, 4>;
713 def LGHRL : UnaryRILPC<"lghrl", 0xC44, aligned_z_asextloadi16, GR64>;
714 def LGFRL : UnaryRILPC<"lgfrl", 0xC4C, aligned_z_asextloadi32, GR64>;
715 let Defs = [CC], CCValues = 0xE, CompareZeroCCMask = 0xE in
716 def LTGF : UnaryRXY<"ltgf", 0xE332, z_asextloadi32, GR64, 4>;
727 def LLCR : UnaryRRE<"llcr", 0xB994, zext8, GR32, GR32>;
731 def LLHR : UnaryRRE<"llhr", 0xB995, zext16, GR32, GR32>;
734 def LLGCR : UnaryRRE<"llgcr", 0xB984, zext8, GR64, GR64>;
735 def LLGHR : UnaryRRE<"llghr", 0xB985, zext16, GR64, GR64>;
736 def LLGFR : UnaryRRE<"llgfr", 0xB916, zext32, GR64, GR32>;
740 def : Pat<(and GR64:$src, 0xffffffff),
747 def LLC : UnaryRXY<"llc", 0xE394, z_azextloadi8, GR32, 1>;
748 def LLCH : UnaryRXY<"llch", 0xE3C2, z_azextloadi8, GRH32, 1>,
755 def LLH : UnaryRXY<"llh", 0xE395, z_azextloadi16, GR32, 2>;
756 def LLHH : UnaryRXY<"llhh", 0xE3C6, z_azextloadi16, GRH32, 2>,
758 def LLHRL : UnaryRILPC<"llhrl", 0xC42, aligned_z_azextloadi16, GR32>;
761 def LLGC : UnaryRXY<"llgc", 0xE390, z_azextloadi8, GR64, 1>;
762 def LLGH : UnaryRXY<"llgh", 0xE391, z_azextloadi16, GR64, 2>;
763 def LLGF : UnaryRXY<"llgf", 0xE316, z_azextloadi32, GR64, 4>;
764 def LLGHRL : UnaryRILPC<"llghrl", 0xC46, aligned_z_azextloadi16, GR64>;
765 def LLGFRL : UnaryRILPC<"llgfrl", 0xC4E, aligned_z_azextloadi32, GR64>;
768 def LLGTR : UnaryRRE<"llgtr", 0xB917, null_frag, GR64, GR64>;
769 def LLGT : UnaryRXY<"llgt", 0xE317, null_frag, GR64, 4>;
770 def : Pat<(and GR64:$src, 0x7fffffff),
772 def : Pat<(and (i64 (z_azextloadi32 bdxaddr20only:$src)), 0x7fffffff),
777 def LLZRGF : UnaryRXY<"llzrgf", 0xE33A, null_frag, GR64, 4>;
778 def : Pat<(and (i64 (z_azextloadi32 bdxaddr20only:$src)), 0xffffff00),
784 def LLGFAT : UnaryRXY<"llgfat", 0xE39D, null_frag, GR64, 4>;
785 def LLGTAT : UnaryRXY<"llgtat", 0xE39C, null_frag, GR64, 4>;
816 defm STC : StoreRXPair<"stc", 0x42, 0xE372, truncstorei8, GR32, 1>;
817 def STCH : StoreRXY<"stch", 0xE3C3, truncstorei8, GRH32, 1>,
824 defm STH : StoreRXPair<"sth", 0x40, 0xE370, truncstorei16, GR32, 2>;
825 def STHH : StoreRXY<"sthh", 0xE3C7, truncstorei16, GRH32, 2>,
827 def STHRL : StoreRILPC<"sthrl", 0xC47, aligned_truncstorei16, GR32>;
837 defm STCM : StoreBinaryRSPair<"stcm", 0xBE, 0xEB2D, GR32, 0>;
838 def STCMH : StoreBinaryRSY<"stcmh", 0xEB2C, GRH32, 0>;
845 defm LM : LoadMultipleRSPair<"lm", 0x98, 0xEB98, GR32>;
846 def LMG : LoadMultipleRSY<"lmg", 0xEB04, GR64>;
847 def LMH : LoadMultipleRSY<"lmh", 0xEB96, GRH32>;
848 def LMD : LoadMultipleSSe<"lmd", 0xEF, GR64>;
851 defm STM : StoreMultipleRSPair<"stm", 0x90, 0xEB90, GR32>;
852 def STMG : StoreMultipleRSY<"stmg", 0xEB24, GR64>;
853 def STMH : StoreMultipleRSY<"stmh", 0xEB26, GRH32>;
860 def LRVR : UnaryRRE<"lrvr", 0xB91F, bswap, GR32, GR32>;
861 def LRVGR : UnaryRRE<"lrvgr", 0xB90F, bswap, GR64, GR64>;
864 def LRVH : UnaryRXY<"lrvh", 0xE31F, z_loadbswap16, GR32, 2>;
865 def LRV : UnaryRXY<"lrv", 0xE31E, z_loadbswap32, GR32, 4>;
866 def LRVG : UnaryRXY<"lrvg", 0xE30F, z_loadbswap64, GR64, 8>;
869 def STRVH : StoreRXY<"strvh", 0xE33F, z_storebswap16, GR32, 2>;
870 def STRV : StoreRXY<"strv", 0xE33E, z_storebswap32, GR32, 4>;
871 def STRVG : StoreRXY<"strvg", 0xE32F, z_storebswap64, GR64, 8>;
875 def MVCIN : SideEffectBinarySSa<"mvcin", 0xE8>;
883 defm LA : LoadAddressRXPair<"la", 0x41, 0xE371, bitconvert>;
888 def LARL : LoadAddressRIL<"larl", 0xC00, bitconvert>;
901 let CCValues = 0xF, CompareZeroCCMask = 0x8 in {
902 def LPR : UnaryRR <"lpr", 0x10, abs, GR32, GR32>;
903 def LPGR : UnaryRRE<"lpgr", 0xB900, abs, GR64, GR64>;
905 let CCValues = 0xE, CompareZeroCCMask = 0xE in
906 def LPGFR : UnaryRRE<"lpgfr", 0xB910, null_frag, GR64, GR32>;
911 let CCValues = 0xF, CompareZeroCCMask = 0x8 in {
912 def LNR : UnaryRR <"lnr", 0x11, z_inegabs, GR32, GR32>;
913 def LNGR : UnaryRRE<"lngr", 0xB901, z_inegabs, GR64, GR64>;
915 let CCValues = 0xE, CompareZeroCCMask = 0xE in
916 def LNGFR : UnaryRRE<"lngfr", 0xB911, null_frag, GR64, GR32>;
921 let CCValues = 0xF, CompareZeroCCMask = 0x8 in {
922 def LCR : UnaryRR <"lcr", 0x13, ineg, GR32, GR32>;
923 def LCGR : UnaryRRE<"lcgr", 0xB903, ineg, GR64, GR64>;
925 let CCValues = 0xE, CompareZeroCCMask = 0xE in
926 def LCGFR : UnaryRRE<"lcgfr", 0xB913, null_frag, GR64, GR32>;
935 defm IC32 : BinaryRXPair<"ic", 0x43, 0xE373, inserti8, GR32, z_azextloadi8, 1>;
936 defm IC : BinaryRXPair<"ic", 0x43, 0xE373, inserti8, GR64, z_azextloadi8, 1>;
946 defm ICM : TernaryRSPair<"icm", 0xBF, 0xEB81, GR32, 0>;
947 def ICMH : TernaryRSY<"icmh", 0xEB80, GRH32, 0>;
959 def IILL : BinaryRI<"iill", 0xA53, insertll, GR32, imm32ll16>;
960 def IILH : BinaryRI<"iilh", 0xA52, insertlh, GR32, imm32lh16>;
961 def IIHL : BinaryRI<"iihl", 0xA51, insertll, GRH32, imm32ll16>;
962 def IIHH : BinaryRI<"iihh", 0xA50, insertlh, GRH32, imm32lh16>;
975 def IILF : UnaryRIL<"iilf", 0xC09, bitconvert, GR32, uimm32>;
976 def IIHF : UnaryRIL<"iihf", 0xC08, bitconvert, GRH32, uimm32>;
993 let Defs = [CC], CCValues = 0xF, CCIfNoSignedWrap = 1 in {
996 defm AR : BinaryRRAndK<"ar", 0x1A, 0xB9F8, z_sadd, GR32, GR32>;
997 defm AGR : BinaryRREAndK<"agr", 0xB908, 0xB9E8, z_sadd, GR64, GR64>;
999 def AGFR : BinaryRRE<"agfr", 0xB918, null_frag, GR64, GR32>;
1002 def AHHHR : BinaryRRFa<"ahhhr", 0xB9C8, null_frag, GRH32, GRH32, GRH32>,
1004 def AHHLR : BinaryRRFa<"ahhlr", 0xB9D8, null_frag, GRH32, GRH32, GR32>,
1009 defm AHI : BinaryRIAndK<"ahi", 0xA7A, 0xECD8, z_sadd, GR32, imm32sx16>;
1010 defm AGHI : BinaryRIAndK<"aghi", 0xA7B, 0xECD9, z_sadd, GR64, imm64sx16>;
1015 def AFI : BinaryRIL<"afi", 0xC29, z_sadd, GR32, simm32>;
1016 def AIH : BinaryRIL<"aih", 0xCC8, z_sadd, GRH32, simm32>,
1018 def AGFI : BinaryRIL<"agfi", 0xC28, z_sadd, GR64, imm64sx32>;
1021 defm AH : BinaryRXPair<"ah", 0x4A, 0xE37A, z_sadd, GR32, z_asextloadi16, 2>;
1022 defm A : BinaryRXPairAndPseudo<"a", 0x5A, 0xE35A, z_sadd, GR32, z_load, 4>;
1023 def AGH : BinaryRXY<"agh", 0xE338, z_sadd, GR64, z_asextloadi16, 2>,
1025 def AGF : BinaryRXY<"agf", 0xE318, z_sadd, GR64, z_asextloadi32, 4>;
1026 defm AG : BinaryRXYAndPseudo<"ag", 0xE308, z_sadd, GR64, z_load, 8>;
1029 def ASI : BinarySIY<"asi", 0xEB6A, add, imm32sx8>;
1030 def AGSI : BinarySIY<"agsi", 0xEB7A, add, imm64sx8>;
1035 let Defs = [CC], CCValues = 0xF, IsLogical = 1 in {
1038 defm ALR : BinaryRRAndK<"alr", 0x1E, 0xB9FA, z_uadd, GR32, GR32>;
1039 defm ALGR : BinaryRREAndK<"algr", 0xB90A, 0xB9EA, z_uadd, GR64, GR64>;
1041 def ALGFR : BinaryRRE<"algfr", 0xB91A, null_frag, GR64, GR32>;
1044 def ALHHHR : BinaryRRFa<"alhhhr", 0xB9CA, null_frag, GRH32, GRH32, GRH32>,
1046 def ALHHLR : BinaryRRFa<"alhhlr", 0xB9DA, null_frag, GRH32, GRH32, GR32>,
1050 def ALHSIK : BinaryRIE<"alhsik", 0xECDA, z_uadd, GR32, imm32sx16>,
1052 def ALGHSIK : BinaryRIE<"alghsik", 0xECDB, z_uadd, GR64, imm64sx16>,
1056 def ALFI : BinaryRIL<"alfi", 0xC2B, z_uadd, GR32, uimm32>;
1057 def ALGFI : BinaryRIL<"algfi", 0xC2A, z_uadd, GR64, imm64zx32>;
1060 def ALSIH : BinaryRIL<"alsih", 0xCCA, null_frag, GRH32, simm32>,
1064 defm AL : BinaryRXPairAndPseudo<"al", 0x5E, 0xE35E, z_uadd, GR32, z_load, 4>;
1065 def ALGF : BinaryRXY<"algf", 0xE31A, z_uadd, GR64, z_azextloadi32, 4>;
1066 defm ALG : BinaryRXYAndPseudo<"alg", 0xE30A, z_uadd, GR64, z_load, 8>;
1069 def ALSI : BinarySIY<"alsi", 0xEB6E, null_frag, imm32sx8>;
1070 def ALGSI : BinarySIY<"algsi", 0xEB7E, null_frag, imm64sx8>;
1075 let Defs = [CC], Uses = [CC], CCValues = 0xF, IsLogical = 1 in {
1077 def ALCR : BinaryRRE<"alcr", 0xB998, z_addcarry, GR32, GR32>;
1078 def ALCGR : BinaryRRE<"alcgr", 0xB988, z_addcarry, GR64, GR64>;
1081 def ALC : BinaryRXY<"alc", 0xE398, z_addcarry, GR32, z_load, 4>;
1082 def ALCG : BinaryRXY<"alcg", 0xE388, z_addcarry, GR64, z_load, 8>;
1086 def ALSIHN : BinaryRIL<"alsihn", 0xCCB, null_frag, GRH32, simm32>,
1095 let Defs = [CC], CCValues = 0xF, CompareZeroCCMask = 0x8,
1098 defm SR : BinaryRRAndK<"sr", 0x1B, 0xB9F9, z_ssub, GR32, GR32>;
1099 def SGFR : BinaryRRE<"sgfr", 0xB919, null_frag, GR64, GR32>;
1100 defm SGR : BinaryRREAndK<"sgr", 0xB909, 0xB9E9, z_ssub, GR64, GR64>;
1103 def SHHHR : BinaryRRFa<"shhhr", 0xB9C9, null_frag, GRH32, GRH32, GRH32>,
1105 def SHHLR : BinaryRRFa<"shhlr", 0xB9D9, null_frag, GRH32, GRH32, GR32>,
1109 defm SH : BinaryRXPair<"sh", 0x4B, 0xE37B, z_ssub, GR32, z_asextloadi16, 2>;
1110 defm S : BinaryRXPairAndPseudo<"s", 0x5B, 0xE35B, z_ssub, GR32, z_load, 4>;
1111 def SGH : BinaryRXY<"sgh", 0xE339, z_ssub, GR64, z_asextloadi16, 2>,
1113 def SGF : BinaryRXY<"sgf", 0xE319, z_ssub, GR64, z_asextloadi32, 4>;
1114 defm SG : BinaryRXYAndPseudo<"sg", 0xE309, z_ssub, GR64, z_load, 8>;
1145 let Defs = [CC], CCValues = 0x7, IsLogical = 1 in {
1147 defm SLR : BinaryRRAndK<"slr", 0x1F, 0xB9FB, z_usub, GR32, GR32>;
1148 def SLGFR : BinaryRRE<"slgfr", 0xB91B, null_frag, GR64, GR32>;
1149 defm SLGR : BinaryRREAndK<"slgr", 0xB90B, 0xB9EB, z_usub, GR64, GR64>;
1152 def SLHHHR : BinaryRRFa<"slhhhr", 0xB9CB, null_frag, GRH32, GRH32, GRH32>,
1154 def SLHHLR : BinaryRRFa<"slhhlr", 0xB9DB, null_frag, GRH32, GRH32, GR32>,
1158 def SLFI : BinaryRIL<"slfi", 0xC25, z_usub, GR32, uimm32>;
1159 def SLGFI : BinaryRIL<"slgfi", 0xC24, z_usub, GR64, imm64zx32>;
1162 defm SL : BinaryRXPairAndPseudo<"sl", 0x5F, 0xE35F, z_usub, GR32, z_load, 4>;
1163 def SLGF : BinaryRXY<"slgf", 0xE31B, z_usub, GR64, z_azextloadi32, 4>;
1164 defm SLG : BinaryRXYAndPseudo<"slg", 0xE30B, z_usub, GR64, z_load, 8>;
1183 let Defs = [CC], Uses = [CC], CCValues = 0xF, IsLogical = 1 in {
1185 def SLBR : BinaryRRE<"slbr", 0xB999, z_subcarry, GR32, GR32>;
1186 def SLBGR : BinaryRRE<"slbgr", 0xB989, z_subcarry, GR64, GR64>;
1189 def SLB : BinaryRXY<"slb", 0xE399, z_subcarry, GR32, z_load, 4>;
1190 def SLBG : BinaryRXY<"slbg", 0xE389, z_subcarry, GR64, z_load, 8>;
1200 let isCommutable = 1, CCValues = 0xC, CompareZeroCCMask = 0x8 in {
1201 defm NR : BinaryRRAndK<"nr", 0x14, 0xB9F4, and, GR32, GR32>;
1202 defm NGR : BinaryRREAndK<"ngr", 0xB980, 0xB9E4, and, GR64, GR64>;
1214 def NILL : BinaryRI<"nill", 0xA57, and, GR32, imm32ll16c>;
1215 def NILH : BinaryRI<"nilh", 0xA56, and, GR32, imm32lh16c>;
1216 def NIHL : BinaryRI<"nihl", 0xA55, and, GRH32, imm32ll16c>;
1217 def NIHH : BinaryRI<"nihh", 0xA54, and, GRH32, imm32lh16c>;
1226 let CCValues = 0xC, CompareZeroCCMask = 0x8 in {
1230 def NILF : BinaryRIL<"nilf", 0xC0B, and, GR32, uimm32>;
1231 def NIHF : BinaryRIL<"nihf", 0xC0A, and, GRH32, uimm32>;
1238 let CCValues = 0xC, CompareZeroCCMask = 0x8 in {
1239 defm N : BinaryRXPairAndPseudo<"n", 0x54, 0xE354, and, GR32, z_load, 4>;
1240 defm NG : BinaryRXYAndPseudo<"ng", 0xE380, and, GR64, z_load, 8>;
1244 defm NI : BinarySIPair<"ni", 0x94, 0xEB54, null_frag, imm32zx8>;
1248 defm NC : MemorySS<"nc", 0xD4, z_nc>;
1259 let isCommutable = 1, CCValues = 0xC, CompareZeroCCMask = 0x8 in {
1260 defm OR : BinaryRRAndK<"or", 0x16, 0xB9F6, or, GR32, GR32>;
1261 defm OGR : BinaryRREAndK<"ogr", 0xB981, 0xB9E6, or, GR64, GR64>;
1272 def OILL : BinaryRI<"oill", 0xA5B, or, GR32, imm32ll16>;
1273 def OILH : BinaryRI<"oilh", 0xA5A, or, GR32, imm32lh16>;
1274 def OIHL : BinaryRI<"oihl", 0xA59, or, GRH32, imm32ll16>;
1275 def OIHH : BinaryRI<"oihh", 0xA58, or, GRH32, imm32lh16>;
1284 let CCValues = 0xC, CompareZeroCCMask = 0x8 in {
1288 def OILF : BinaryRIL<"oilf", 0xC0D, or, GR32, uimm32>;
1289 def OIHF : BinaryRIL<"oihf", 0xC0C, or, GRH32, uimm32>;
1295 let CCValues = 0xC, CompareZeroCCMask = 0x8 in {
1296 defm O : BinaryRXPairAndPseudo<"o", 0x56, 0xE356, or, GR32, z_load, 4>;
1297 defm OG : BinaryRXYAndPseudo<"og", 0xE381, or, GR64, z_load, 8>;
1301 defm OI : BinarySIPair<"oi", 0x96, 0xEB56, null_frag, imm32zx8>;
1305 defm OC : MemorySS<"oc", 0xD6, z_oc>;
1316 let isCommutable = 1, CCValues = 0xC, CompareZeroCCMask = 0x8 in {
1317 defm XR : BinaryRRAndK<"xr", 0x17, 0xB9F7, xor, GR32, GR32>;
1318 defm XGR : BinaryRREAndK<"xgr", 0xB982, 0xB9E7, xor, GR64, GR64>;
1324 let CCValues = 0xC, CompareZeroCCMask = 0x8 in {
1328 def XILF : BinaryRIL<"xilf", 0xC07, xor, GR32, uimm32>;
1329 def XIHF : BinaryRIL<"xihf", 0xC06, xor, GRH32, uimm32>;
1335 let CCValues = 0xC, CompareZeroCCMask = 0x8 in {
1336 defm X : BinaryRXPairAndPseudo<"x",0x57, 0xE357, xor, GR32, z_load, 4>;
1337 defm XG : BinaryRXYAndPseudo<"xg", 0xE382, xor, GR64, z_load, 8>;
1341 defm XI : BinarySIPair<"xi", 0x97, 0xEB57, null_frag, imm32zx8>;
1345 defm XC : MemorySS<"xc", 0xD7, z_xc>;
1357 let CCValues = 0xC, CompareZeroCCMask = 0x8 in {
1358 def NCRK : BinaryRRFa<"ncrk", 0xB9F5, andc, GR32, GR32, GR32>;
1359 def NCGRK : BinaryRRFa<"ncgrk", 0xB9E5, andc, GR64, GR64, GR64>;
1363 let CCValues = 0xC, CompareZeroCCMask = 0x8 in {
1364 def OCRK : BinaryRRFa<"ocrk", 0xB975, orc, GR32, GR32, GR32>;
1365 def OCGRK : BinaryRRFa<"ocgrk", 0xB965, orc, GR64, GR64, GR64>;
1369 let isCommutable = 1, CCValues = 0xC, CompareZeroCCMask = 0x8 in {
1370 def NNRK : BinaryRRFa<"nnrk", 0xB974, nand, GR32, GR32, GR32>;
1371 def NNGRK : BinaryRRFa<"nngrk", 0xB964, nand, GR64, GR64, GR64>;
1375 let isCommutable = 1, CCValues = 0xC, CompareZeroCCMask = 0x8 in {
1376 def NORK : BinaryRRFa<"nork", 0xB976, nor, GR32, GR32, GR32>;
1377 def NOGRK : BinaryRRFa<"nogrk", 0xB966, nor, GR64, GR64, GR64>;
1379 def NOTR : UnaryRRFa<"notr", 0xB976, nor, GR32, GR32>;
1380 def NOTGR : UnaryRRFa<"notgr", 0xB966, nor, GR64, GR64>;
1385 let isCommutable = 1, CCValues = 0xC, CompareZeroCCMask = 0x8 in {
1386 def NXRK : BinaryRRFa<"nxrk", 0xB977, nxor, GR32, GR32, GR32>;
1387 def NXGRK : BinaryRRFa<"nxgrk", 0xB967, nxor, GR64, GR64, GR64>;
1400 def MSRKC : BinaryRRFa<"msrkc", 0xB9FD, mul, GR32, GR32, GR32>;
1401 def MSGRKC : BinaryRRFa<"msgrkc", 0xB9ED, mul, GR64, GR64, GR64>;
1406 def MSR : BinaryRRE<"msr", 0xB252, mul, GR32, GR32>;
1407 def MSGR : BinaryRRE<"msgr", 0xB90C, mul, GR64, GR64>;
1409 def MSGFR : BinaryRRE<"msgfr", 0xB91C, null_frag, GR64, GR32>;
1413 def MHI : BinaryRI<"mhi", 0xA7C, mul, GR32, imm32sx16>;
1414 def MGHI : BinaryRI<"mghi", 0xA7D, mul, GR64, imm64sx16>;
1417 def MSFI : BinaryRIL<"msfi", 0xC21, mul, GR32, simm32>;
1418 def MSGFI : BinaryRIL<"msgfi", 0xC20, mul, GR64, imm64sx32>;
1421 defm MH : BinaryRXPair<"mh", 0x4C, 0xE37C, mul, GR32, z_asextloadi16, 2>;
1422 defm MS : BinaryRXPair<"ms", 0x71, 0xE351, mul, GR32, z_load, 4>;
1423 def MGH : BinaryRXY<"mgh", 0xE33C, mul, GR64, z_asextloadi16, 2>,
1425 def MSGF : BinaryRXY<"msgf", 0xE31C, mul, GR64, z_asextloadi32, 4>;
1426 def MSG : BinaryRXY<"msg", 0xE30C, mul, GR64, z_load, 8>;
1430 defm MSC : BinaryRXYAndPseudo<"msc", 0xE353, null_frag, GR32, z_load, 4>;
1431 defm MSGC : BinaryRXYAndPseudo<"msgc", 0xE383, null_frag, GR64, z_load, 8>;
1435 def MR : BinaryRR <"mr", 0x1C, null_frag, GR128, GR32>;
1436 def MGRK : BinaryRRFa<"mgrk", 0xB9EC, null_frag, GR128, GR64, GR64>,
1438 def MLR : BinaryRRE<"mlr", 0xB996, null_frag, GR128, GR32>;
1439 def MLGR : BinaryRRE<"mlgr", 0xB986, null_frag, GR128, GR64>;
1447 def M : BinaryRX <"m", 0x5C, null_frag, GR128, z_load, 4>;
1448 def MFY : BinaryRXY<"mfy", 0xE35C, null_frag, GR128, z_load, 4>;
1449 def MG : BinaryRXY<"mg", 0xE384, null_frag, GR128, z_load, 8>,
1451 def ML : BinaryRXY<"ml", 0xE396, null_frag, GR128, z_load, 4>;
1452 def MLG : BinaryRXY<"mlg", 0xE386, null_frag, GR128, z_load, 8>;
1465 def DR : BinaryRR <"dr", 0x1D, null_frag, GR128, GR32>;
1466 def DSGFR : BinaryRRE<"dsgfr", 0xB91D, null_frag, GR128, GR32>;
1467 def DSGR : BinaryRRE<"dsgr", 0xB90D, null_frag, GR128, GR64>;
1468 def DLR : BinaryRRE<"dlr", 0xB997, null_frag, GR128, GR32>;
1469 def DLGR : BinaryRRE<"dlgr", 0xB987, null_frag, GR128, GR64>;
1472 def D : BinaryRX <"d", 0x5D, null_frag, GR128, z_load, 4>;
1473 def DSGF : BinaryRXY<"dsgf", 0xE31D, null_frag, GR128, z_load, 4>;
1474 def DSG : BinaryRXY<"dsg", 0xE30D, null_frag, GR128, z_load, 8>;
1475 def DL : BinaryRXY<"dl", 0xE397, null_frag, GR128, z_load, 4>;
1476 def DLG : BinaryRXY<"dlg", 0xE387, null_frag, GR128, z_load, 8>;
1503 defm SLL : BinaryRSAndK<"sll", 0x89, 0xEBDF, shiftop<shl>, GR32>;
1504 def SLLG : BinaryRSY<"sllg", 0xEB0D, shiftop<shl>, GR64>;
1505 def SLDL : BinaryRS<"sldl", 0x8D, null_frag, GR128>;
1509 defm SLA : BinaryRSAndK<"sla", 0x8B, 0xEBDD, null_frag, GR32>;
1510 def SLAG : BinaryRSY<"slag", 0xEB0B, null_frag, GR64>;
1511 def SLDA : BinaryRS<"slda", 0x8F, null_frag, GR128>;
1515 defm SRL : BinaryRSAndK<"srl", 0x88, 0xEBDE, shiftop<srl>, GR32>;
1516 def SRLG : BinaryRSY<"srlg", 0xEB0C, shiftop<srl>, GR64>;
1517 def SRDL : BinaryRS<"srdl", 0x8C, null_frag, GR128>;
1520 let Defs = [CC], CCValues = 0xE, CompareZeroCCMask = 0xE in {
1521 defm SRA : BinaryRSAndK<"sra", 0x8A, 0xEBDC, shiftop<sra>, GR32>;
1522 def SRAG : BinaryRSY<"srag", 0xEB0A, shiftop<sra>, GR64>;
1523 def SRDA : BinaryRS<"srda", 0x8E, null_frag, GR128>;
1527 def RLL : BinaryRSY<"rll", 0xEB1D, shiftop<rotl>, GR32>;
1528 def RLLG : BinaryRSY<"rllg", 0xEB1C, shiftop<rotl>, GR64>;
1535 def RISBG32 : RotateSelectRIEf<"risbg", 0xEC55, GR32, GR32>;
1536 let CCValues = 0xE, CompareZeroCCMask = 0xE in {
1537 def RISBG : RotateSelectRIEf<"risbg", 0xEC55, GR64, GR64>;
1538 def RISBGZ : RotateSelectRIEf<"risbgz", 0xEC55, GR64, GR64, 0, 128>;
1544 def RISBGN : RotateSelectRIEf<"risbgn", 0xEC59, GR64, GR64>;
1545 def RISBGNZ : RotateSelectRIEf<"risbgnz", 0xEC59, GR64, GR64, 0, 128>;
1556 def RISBLG : RotateSelectRIEf<"risblg", 0xEC51, GR32, GR64>;
1557 def RISBHG : RotateSelectRIEf<"risbhg", 0xEC5D, GRH32, GR64>;
1564 def RNSBG : RotateSelectRIEf<"rnsbg", 0xEC54, GR64, GR64>;
1565 def ROSBG : RotateSelectRIEf<"rosbg", 0xEC56, GR64, GR64>;
1566 def RXSBG : RotateSelectRIEf<"rxsbg", 0xEC57, GR64, GR64>;
1576 let Defs = [CC], CCValues = 0xE in {
1578 def CR : CompareRR <"cr", 0x19, z_scmp, GR32, GR32>;
1579 def CGFR : CompareRRE<"cgfr", 0xB930, null_frag, GR64, GR32>;
1580 def CGR : CompareRRE<"cgr", 0xB920, z_scmp, GR64, GR64>;
1583 def CHHR : CompareRRE<"chhr", 0xB9CD, null_frag, GRH32, GRH32>,
1585 def CHLR : CompareRRE<"chlr", 0xB9DD, null_frag, GRH32, GR32>,
1592 def CHI : CompareRI<"chi", 0xA7E, z_scmp, GR32, imm32sx16>;
1593 def CGHI : CompareRI<"cghi", 0xA7F, z_scmp, GR64, imm64sx16>;
1599 def CFI : CompareRIL<"cfi", 0xC2D, z_scmp, GR32, simm32>;
1600 def CIH : CompareRIL<"cih", 0xCCD, z_scmp, GRH32, simm32>,
1602 def CGFI : CompareRIL<"cgfi", 0xC2C, z_scmp, GR64, imm64sx32>;
1605 defm CH : CompareRXPair<"ch", 0x49, 0xE379, z_scmp, GR32, z_asextloadi16, 2>;
1608 defm C : CompareRXPair<"c", 0x59, 0xE359, z_scmp, GR32, z_load, 4>;
1609 def CHF : CompareRXY<"chf", 0xE3CD, z_scmp, GRH32, z_load, 4>,
1611 def CGH : CompareRXY<"cgh", 0xE334, z_scmp, GR64, z_asextloadi16, 2>;
1612 def CGF : CompareRXY<"cgf", 0xE330, z_scmp, GR64, z_asextloadi32, 4>;
1613 def CG : CompareRXY<"cg", 0xE320, z_scmp, GR64, z_load, 8>;
1614 def CHRL : CompareRILPC<"chrl", 0xC65, z_scmp, GR32, aligned_z_asextloadi16>;
1615 def CRL : CompareRILPC<"crl", 0xC6D, z_scmp, GR32, aligned_z_load>;
1616 def CGHRL : CompareRILPC<"cghrl", 0xC64, z_scmp, GR64, aligned_z_asextloadi16>;
1617 def CGFRL : CompareRILPC<"cgfrl", 0xC6C, z_scmp, GR64, aligned_z_asextloadi32>;
1618 def CGRL : CompareRILPC<"cgrl", 0xC68, z_scmp, GR64, aligned_z_load>;
1621 def CHHSI : CompareSIL<"chhsi", 0xE554, z_scmp, z_asextloadi16, imm32sx16>;
1622 def CHSI : CompareSIL<"chsi", 0xE55C, z_scmp, z_load, imm32sx16>;
1623 def CGHSI : CompareSIL<"cghsi", 0xE558, z_scmp, z_load, imm64sx16>;
1628 let Defs = [CC], CCValues = 0xE, IsLogical = 1 in {
1630 def CLR : CompareRR <"clr", 0x15, z_ucmp, GR32, GR32>;
1631 def CLGFR : CompareRRE<"clgfr", 0xB931, null_frag, GR64, GR32>;
1632 def CLGR : CompareRRE<"clgr", 0xB921, z_ucmp, GR64, GR64>;
1635 def CLHHR : CompareRRE<"clhhr", 0xB9CF, null_frag, GRH32, GRH32>,
1637 def CLHLR : CompareRRE<"clhlr", 0xB9DF, null_frag, GRH32, GR32>,
1644 def CLFI : CompareRIL<"clfi", 0xC2F, z_ucmp, GR32, uimm32>;
1645 def CLIH : CompareRIL<"clih", 0xCCF, z_ucmp, GRH32, uimm32>,
1647 def CLGFI : CompareRIL<"clgfi", 0xC2E, z_ucmp, GR64, imm64zx32>;
1652 defm CL : CompareRXPair<"cl", 0x55, 0xE355, z_ucmp, GR32, z_load, 4>;
1653 def CLHF : CompareRXY<"clhf", 0xE3CF, z_ucmp, GRH32, z_load, 4>,
1655 def CLGF : CompareRXY<"clgf", 0xE331, z_ucmp, GR64, z_azextloadi32, 4>;
1656 def CLG : CompareRXY<"clg", 0xE321, z_ucmp, GR64, z_load, 8>;
1657 def CLHRL : CompareRILPC<"clhrl", 0xC67, z_ucmp, GR32,
1659 def CLRL : CompareRILPC<"clrl", 0xC6F, z_ucmp, GR32,
1661 def CLGHRL : CompareRILPC<"clghrl", 0xC66, z_ucmp, GR64,
1663 def CLGFRL : CompareRILPC<"clgfrl", 0xC6E, z_ucmp, GR64,
1665 def CLGRL : CompareRILPC<"clgrl", 0xC6A, z_ucmp, GR64,
1669 defm CLI : CompareSIPair<"cli", 0x95, 0xEB55, z_ucmp, z_azextloadi8, imm32zx8>;
1672 def CLHHSI : CompareSIL<"clhhsi", 0xE555, z_ucmp, z_azextloadi16, imm32zx16>;
1673 def CLFHSI : CompareSIL<"clfhsi", 0xE55D, z_ucmp, z_load, imm32zx16>;
1674 def CLGHSI : CompareSIL<"clghsi", 0xE559, z_ucmp, z_load, imm64zx16>;
1680 defm CLC : CompareMemorySS<"clc", 0xD5, z_clc>;
1681 def CLCL : SideEffectBinaryMemMemRR<"clcl", 0x0F, GR128, GR128>;
1682 def CLCLE : SideEffectTernaryMemMemRS<"clcle", 0xA9, GR128, GR128>;
1683 def CLCLU : SideEffectTernaryMemMemRSY<"clclu", 0xEB8F, GR128, GR128>;
1688 defm CLST : StringRRE<"clst", 0xB25D, z_strcmp>;
1697 def TMLL : CompareRI<"tmll", 0xA71, z_tm_reg, GR32, imm32ll16>;
1698 def TMLH : CompareRI<"tmlh", 0xA70, z_tm_reg, GR32, imm32lh16>;
1699 def TMHL : CompareRI<"tmhl", 0xA73, z_tm_reg, GRH32, imm32ll16>;
1700 def TMHH : CompareRI<"tmhh", 0xA72, z_tm_reg, GRH32, imm32lh16>;
1707 defm TM : CompareSIPair<"tm", 0x91, 0xEB51, z_tm_mem, z_anyextloadi8, imm32zx8>;
1710 def TML : InstAlias<"tml\t$R, $I", (TMLL GR32:$R, imm32ll16:$I), 0>;
1711 def TMH : InstAlias<"tmh\t$R, $I", (TMLH GR32:$R, imm32lh16:$I), 0>;
1715 defm CLM : CompareRSPair<"clm", 0xBD, 0xEB21, GR32, 0>;
1716 def CLMH : CompareRSY<"clmh", 0xEB20, GRH32, 0>;
1724 def PFD : PrefetchRXY<"pfd", 0xE336, z_prefetch>;
1725 def PFDRL : PrefetchRILPC<"pfdrl", 0xC62, z_prefetch>;
1730 def BPP : BranchPreloadSMI<"bpp", 0xC7>;
1731 def BPRP : BranchPreloadMII<"bprp", 0xC5>;
1734 def NIAI : SideEffectBinaryIE<"niai", 0xB2FA, imm32zx4, imm32zx4>;
1742 // accesses, which expands to "bcr 14, 0".
1747 def LAA : LoadAndOpRSY<"laa", 0xEBF8, atomic_load_add_i32, GR32>;
1748 def LAAG : LoadAndOpRSY<"laag", 0xEBE8, atomic_load_add_i64, GR64>;
1749 def LAAL : LoadAndOpRSY<"laal", 0xEBFA, null_frag, GR32>;
1750 def LAALG : LoadAndOpRSY<"laalg", 0xEBEA, null_frag, GR64>;
1751 def LAN : LoadAndOpRSY<"lan", 0xEBF4, atomic_load_and_i32, GR32>;
1752 def LANG : LoadAndOpRSY<"lang", 0xEBE4, atomic_load_and_i64, GR64>;
1753 def LAO : LoadAndOpRSY<"lao", 0xEBF6, atomic_load_or_i32, GR32>;
1754 def LAOG : LoadAndOpRSY<"laog", 0xEBE6, atomic_load_or_i64, GR64>;
1755 def LAX : LoadAndOpRSY<"lax", 0xEBF7, atomic_load_xor_i32, GR32>;
1756 def LAXG : LoadAndOpRSY<"laxg", 0xEBE7, atomic_load_xor_i64, GR64>;
1801 def TS : StoreInherentS<"ts", 0x9300, null_frag, 1>;
1805 defm CS : CmpSwapRSPair<"cs", 0xBA, 0xEB14, z_atomic_cmp_swap, GR32>;
1806 def CSG : CmpSwapRSY<"csg", 0xEB30, z_atomic_cmp_swap, GR64>;
1811 defm CDS : CmpSwapRSPair<"cds", 0xBB, 0xEB31, null_frag, GR128>;
1812 def CDSG : CmpSwapRSY<"cdsg", 0xEB3E, z_atomic_cmp_swap_128, GR128>;
1817 def CSST : SideEffectTernarySSF<"csst", 0xC82, GR64>;
1821 def PLO : SideEffectQuaternarySSe<"plo", 0xEE, GR64>;
1824 def LPQ : UnaryRXY<"lpq", 0xE38F, z_atomic_load_128, GR128, 16>;
1825 def STPQ : StoreRXY<"stpq", 0xE38E, z_atomic_store_128, GR128, 16>;
1829 def LPD : BinarySSF<"lpd", 0xC84, GR128>;
1830 def LPDG : BinarySSF<"lpdg", 0xC85, GR128>;
1838 def TR : SideEffectBinarySSa<"tr", 0xDC>;
1841 def TRT : SideEffectBinarySSa<"trt", 0xDD>;
1842 def TRTR : SideEffectBinarySSa<"trtr", 0xD0>;
1846 def TRE : SideEffectBinaryMemMemRRE<"tre", 0xB2A5, GR128, GR64>;
1849 defm TRTE : BinaryMemRRFcOpt<"trte", 0xB9BF, GR128, GR64>;
1850 defm TRTRE : BinaryMemRRFcOpt<"trtre", 0xB9BD, GR128, GR64>;
1854 defm TROO : SideEffectTernaryMemMemRRFcOpt<"troo", 0xB993, GR128, GR64>;
1855 defm TROT : SideEffectTernaryMemMemRRFcOpt<"trot", 0xB992, GR128, GR64>;
1856 defm TRTO : SideEffectTernaryMemMemRRFcOpt<"trto", 0xB991, GR128, GR64>;
1857 defm TRTT : SideEffectTernaryMemMemRRFcOpt<"trtt", 0xB990, GR128, GR64>;
1861 defm CU12 : SideEffectTernaryMemMemRRFcOpt<"cu12", 0xB2A7, GR128, GR128>;
1862 defm CU14 : SideEffectTernaryMemMemRRFcOpt<"cu14", 0xB9B0, GR128, GR128>;
1863 defm CU21 : SideEffectTernaryMemMemRRFcOpt<"cu21", 0xB2A6, GR128, GR128>;
1864 defm CU24 : SideEffectTernaryMemMemRRFcOpt<"cu24", 0xB9B1, GR128, GR128>;
1865 def CU41 : SideEffectBinaryMemMemRRE<"cu41", 0xB9B2, GR128, GR128>;
1866 def CU42 : SideEffectBinaryMemMemRRE<"cu42", 0xB9B3, GR128, GR128>;
1869 defm CUUTF : SideEffectTernaryMemMemRRFcOpt<"cuutf", 0xB2A6, GR128, GR128>;
1870 defm CUTFU : SideEffectTernaryMemMemRRFcOpt<"cutfu", 0xB2A7, GR128, GR128>;
1879 def KM : SideEffectBinaryMemMemRRE<"km", 0xB92E, GR128, GR128>;
1880 def KMC : SideEffectBinaryMemMemRRE<"kmc", 0xB92F, GR128, GR128>;
1882 def KIMD : SideEffectBinaryMemRRE<"kimd", 0xB93E, GR64, GR128>;
1883 def KLMD : SideEffectBinaryMemRRE<"klmd", 0xB93F, GR64, GR128>;
1884 def KMAC : SideEffectBinaryMemRRE<"kmac", 0xB91E, GR64, GR128>;
1887 def KMF : SideEffectBinaryMemMemRRE<"kmf", 0xB92A, GR128, GR128>;
1888 def KMO : SideEffectBinaryMemMemRRE<"kmo", 0xB92B, GR128, GR128>;
1889 def KMCTR : SideEffectTernaryMemMemMemRRFb<"kmctr", 0xB92D,
1891 def PCC : SideEffectInherentRRE<"pcc", 0xB92C>;
1895 def PPNO : SideEffectBinaryMemMemRRE<"ppno", 0xB93C, GR128, GR128>;
1897 def PRNO : SideEffectBinaryMemMemRRE<"prno", 0xB93C, GR128, GR128>;
1900 def KMA : SideEffectTernaryMemMemMemRRFb<"kma", 0xB929,
1904 def KDSA : SideEffectBinaryMemRRE<"kdsa", 0xB93A, GR64, GR128>;
1915 def LGG : UnaryRXY<"lgg", 0xE34C, null_frag, GR64, 8>;
1916 def LLGFSG : UnaryRXY<"llgfsg", 0xE348, null_frag, GR64, 4>;
1919 def LGSC : SideEffectBinaryRXY<"lgsc", 0xE34D, GR64>;
1921 def STGSC : SideEffectBinaryRXY<"stgsc", 0xE349, GR64>;
1928 defm CVB : BinaryRXPair<"cvb",0x4F, 0xE306, null_frag, GR32, z_load, 4>;
1929 def CVBG : BinaryRXY<"cvbg", 0xE30E, null_frag, GR64, z_load, 8>;
1931 defm CVD : StoreRXPair<"cvd", 0x4E, 0xE326, null_frag, GR32, 4>;
1932 def CVDG : StoreRXY<"cvdg", 0xE32E, null_frag, GR64, 8>;
1935 def MVN : SideEffectBinarySSa<"mvn", 0xD1>;
1936 def MVZ : SideEffectBinarySSa<"mvz", 0xD3>;
1937 def MVO : SideEffectBinarySSb<"mvo", 0xF1>;
1939 def PACK : SideEffectBinarySSb<"pack", 0xF2>;
1940 def PKA : SideEffectBinarySSf<"pka", 0xE9>;
1941 def PKU : SideEffectBinarySSf<"pku", 0xE1>;
1942 def UNPK : SideEffectBinarySSb<"unpk", 0xF3>;
1944 def UNPKA : SideEffectBinarySSa<"unpka", 0xEA>;
1945 def UNPKU : SideEffectBinarySSa<"unpku", 0xE2>;
1951 def AP : SideEffectBinarySSb<"ap", 0xFA>;
1952 def SP : SideEffectBinarySSb<"sp", 0xFB>;
1953 def ZAP : SideEffectBinarySSb<"zap", 0xF8>;
1954 def SRP : SideEffectTernarySSc<"srp", 0xF0>;
1956 def MP : SideEffectBinarySSb<"mp", 0xFC>;
1957 def DP : SideEffectBinarySSb<"dp", 0xFD>;
1959 def ED : SideEffectBinarySSa<"ed", 0xDE>;
1960 def EDMK : SideEffectBinarySSa<"edmk", 0xDF>;
1965 def CP : CompareSSb<"cp", 0xF9>;
1966 def TP : TestRSL<"tp", 0xEBC0>;
1976 def EAR : UnaryRRE<"ear", 0xB24F, null_frag, GR32, AR32>;
1979 def SAR : UnaryRRE<"sar", 0xB24E, null_frag, AR32, GR32>;
1982 def CPYA : UnaryRRE<"cpya", 0xB24D, null_frag, AR32, AR32>;
1985 defm LAE : LoadAddressRXPair<"lae", 0x51, 0xE375, null_frag>;
1988 defm LAM : LoadMultipleRSPair<"lam", 0x9A, 0xEB9A, AR32>;
1991 defm STAM : StoreMultipleRSPair<"stam", 0x9B, 0xEB9B, AR32>;
1999 def IPM : InherentRRE<"ipm", 0xB222, GR32, z_ipm>;
2003 def SPM : SideEffectUnaryRR<"spm", 0x04, GR32>;
2007 def BAL : CallRX<"bal", 0x45>;
2008 def BALR : CallRR<"balr", 0x05>;
2013 def TAM : SideEffectInherentE<"tam", 0x010B>;
2017 def SAM24 : SideEffectInherentE<"sam24", 0x010C>;
2018 def SAM31 : SideEffectInherentE<"sam31", 0x010D>;
2019 def SAM64 : SideEffectInherentE<"sam64", 0x010E>;
2024 def BSM : CallRR<"bsm", 0x0B>;
2028 def BASSM : CallRR<"bassm", 0x0C>;
2037 def TBEGIN : TestBinarySIL<"tbegin", 0xE560, z_tbegin, imm32zx16>;
2040 def TBEGINC : SideEffectBinarySIL<"tbeginc", 0xE561,
2046 def TEND : TestInherentS<"tend", 0xB2F8, z_tend>;
2051 def TABORT : SideEffectAddressS<"tabort", 0xB2FC, int_s390_tabort>;
2054 def NTSTG : StoreRXY<"ntstg", 0xE325, int_s390_ntstg, GR64, 8>;
2057 def ETND : InherentRRE<"etnd", 0xB2EC, GR32, int_s390_etnd>;
2066 def PPA : SideEffectTernaryRRFc<"ppa", 0xB2E8, GR64, GR64, imm32zx4>;
2081 def FLOGR : UnaryRRE<"flogr", 0xB983, null_frag, GR128, GR64>;
2088 def POPCNTOpt : BinaryRRFc<"popcnt", 0xB9E1, GR64, GR64>;
2092 def POPCNT : UnaryRRE<"popcnt", 0xB9E1, z_popcnt, GR64, GR64>;
2096 defm SRST : StringRRE<"srst", 0xB25E, z_search_string>;
2098 def SRSTU : SideEffectBinaryMemMemRRE<"srstu", 0xB9BE, GR64, GR64>;
2102 def CUSE : SideEffectBinaryMemMemRRE<"cuse", 0xB257, GR128, GR128>;
2106 def CFC : SideEffectAddressS<"cfc", 0xB21A, null_frag>;
2111 def UPT : SideEffectInherentE<"upt", 0x0102>;
2115 def CKSM : SideEffectBinaryMemMemRRE<"cksm", 0xB241, GR64, GR128>;
2119 def CMPSC : SideEffectBinaryMemMemRRE<"cmpsc", 0xB263, GR128, GR128>;
2124 def SORTL : SideEffectBinaryMemMemRRE<"sortl", 0xB938, GR128, GR128>;
2129 def DFLTCC : SideEffectTernaryMemMemRRFa<"dfltcc", 0xB939,
2135 def NNPA : SideEffectInherentRRE<"nnpa", 0xB93B>;
2139 def EX : SideEffectBinaryRX<"ex", 0x44, ADDR64>;
2140 def EXRL : SideEffectBinaryRILPC<"exrl", 0xC60, ADDR64>;
2288 (SLL GR32:$val, (NILL GR32:$shift, imm32zx16trunc:$imm), 0)>;
2291 (SRA GR32:$val, (NILL GR32:$shift, imm32zx16trunc:$imm), 0)>;
2294 (SRL GR32:$val, (NILL GR32:$shift, imm32zx16trunc:$imm), 0)>;
2297 (SLLG GR64:$val, (NILL GR32:$shift, imm32zx16trunc:$imm), 0)>;
2300 (SRAG GR64:$val, (NILL GR32:$shift, imm32zx16trunc:$imm), 0)>;
2303 (SRLG GR64:$val, (NILL GR32:$shift, imm32zx16trunc:$imm), 0)>;
2306 (RLL GR32:$val, (NILL GR32:$shift, imm32zx16trunc:$imm), 0)>;
2309 (RLLG GR64:$val, (NILL GR32:$shift, imm32zx16trunc:$imm), 0)>;
2316 (SLLG GR64:$val, (LCR GR32:$shift), 0)>;
2319 (SRAG GR64:$val, (LCR GR32:$shift), 0)>;
2322 (SRLG GR64:$val, (LCR GR32:$shift), 0)>;
2325 (RLLG GR64:$val, (LCR GR32:$shift), 0)>;
2330 defm : BlockLoadStore<anyextloadi8, i32, MVCImm, NCImm, OCImm, XCImm, 0>;
2333 defm : BlockLoadStore<anyextloadi8, i64, MVCImm, NCImm, OCImm, XCImm, 0>;