172   Register DestReg = MI.getOperand(0).getReg();  in expandRIEPseudo()  local
174   bool DestIsHigh = SystemZ::isHighReg(DestReg);  in expandRIEPseudo()
179     if (DestReg != SrcReg) {  in expandRIEPseudo()
180       emitGRX32Move(*MI.getParent(), MI, MI.getDebugLoc(), DestReg, SrcReg,  in expandRIEPseudo()
183       MI.getOperand(1).setReg(DestReg);  in expandRIEPseudo()
266                                 const DebugLoc &DL, unsigned DestReg,  in emitGRX32Move()  argument
271   bool DestIsHigh = SystemZ::isHighReg(DestReg);  in emitGRX32Move()
280     return BuildMI(MBB, MBBI, DL, get(LowLowOpcode), DestReg)  in emitGRX32Move()
284   return BuildMI(MBB, MBBI, DL, get(Opcode), DestReg)  in emitGRX32Move()
285     .addReg(DestReg, RegState::Undef)  in emitGRX32Move()
860                                    const DebugLoc &DL, MCRegister DestReg,  in copyPhysReg()  argument
865   if (SystemZ::GR128BitRegClass.contains(DestReg, SrcReg)) {  in copyPhysReg()
866     copyPhysReg(MBB, MBBI, DL, RI.getSubReg(DestReg, SystemZ::subreg_h64),  in copyPhysReg()
870     copyPhysReg(MBB, MBBI, DL, RI.getSubReg(DestReg, SystemZ::subreg_l64),  in copyPhysReg()
877   if (SystemZ::GRX32BitRegClass.contains(DestReg, SrcReg)) {  in copyPhysReg()
878     emitGRX32Move(MBB, MBBI, DL, DestReg, SrcReg, SystemZ::LR, 32, KillSrc,  in copyPhysReg()
884   if (SystemZ::VR128BitRegClass.contains(DestReg) &&  in copyPhysReg()
893     BuildMI(MBB, MBBI, DL, get(SystemZ::VMRHG), DestReg)  in copyPhysReg()
898   if (SystemZ::FP128BitRegClass.contains(DestReg) &&  in copyPhysReg()
901         RI.getMatchingSuperReg(RI.getSubReg(DestReg, SystemZ::subreg_h64),  in copyPhysReg()
904         RI.getMatchingSuperReg(RI.getSubReg(DestReg, SystemZ::subreg_l64),  in copyPhysReg()
914   if (SystemZ::FP128BitRegClass.contains(DestReg) &&  in copyPhysReg()
916     MCRegister DestRegHi = RI.getSubReg(DestReg, SystemZ::subreg_h64);  in copyPhysReg()
917     MCRegister DestRegLo = RI.getSubReg(DestReg, SystemZ::subreg_l64);  in copyPhysReg()
923         .addReg(DestReg, RegState::ImplicitDefine);  in copyPhysReg()
931   if (DestReg == SystemZ::CC) {  in copyPhysReg()
940   if (SystemZ::GR128BitRegClass.contains(DestReg) &&  in copyPhysReg()
942     MCRegister DestH64 = RI.getSubReg(DestReg, SystemZ::subreg_h64);  in copyPhysReg()
943     MCRegister DestL64 = RI.getSubReg(DestReg, SystemZ::subreg_l64);  in copyPhysReg()
949         .addDef(DestReg, RegState::Implicit);  in copyPhysReg()
957   if (SystemZ::VR128BitRegClass.contains(DestReg) &&  in copyPhysReg()
959     BuildMI(MBB, MBBI, DL, get(SystemZ::VLVGP), DestReg)  in copyPhysReg()
967   if (SystemZ::GR64BitRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
969   else if (SystemZ::FP32BitRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
972   else if (SystemZ::FP64BitRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
974   else if (SystemZ::FP128BitRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
976   else if (SystemZ::VR32BitRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
978   else if (SystemZ::VR64BitRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
980   else if (SystemZ::VR128BitRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
982   else if (SystemZ::AR32BitRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
987   BuildMI(MBB, MBBI, DL, get(Opcode), DestReg)  in copyPhysReg()
1008                                             Register DestReg, int FrameIdx,  in loadRegFromStackSlot()  argument
1018   addFrameReference(BuildMI(MBB, MBBI, DL, get(LoadOpcode), DestReg),  in loadRegFromStackSlot()