Lines Matching full:opcode
40 // MemKey identifies a targe reg-mem opcode, while MemType can be either
42 // its corresponding target opcode. See comment at MemFoldPseudo.
2258 class InherentRRE<string mnemonic, bits<16> opcode, RegisterOperand cls,
2260 : InstRRE<opcode, (outs cls:$R1), (ins),
2266 class InherentDualRRE<string mnemonic, bits<16> opcode, RegisterOperand cls>
2267 : InstRRE<opcode, (outs cls:$R1, cls:$R2), (ins),
2270 class InherentVRIa<string mnemonic, bits<16> opcode, bits<16> value>
2271 : InstVRIa<opcode, (outs VR128:$V1), (ins), mnemonic#"\t$V1", []> {
2276 class StoreInherentS<string mnemonic, bits<16> opcode,
2278 : InstS<opcode, (outs), (ins (bdaddr12only $B2, $D2):$BD2),
2284 class SideEffectInherentE<string mnemonic, bits<16>opcode>
2285 : InstE<opcode, (outs), (ins), mnemonic, []>;
2287 class SideEffectInherentS<string mnemonic, bits<16> opcode,
2289 : InstS<opcode, (outs), (ins), mnemonic, [(operator)]> {
2294 class SideEffectInherentRRE<string mnemonic, bits<16> opcode>
2295 : InstRRE<opcode, (outs), (ins), mnemonic, []> {
2301 class CallRI<string mnemonic, bits<12> opcode>
2302 : InstRIb<opcode, (outs), (ins GR64:$R1, brtarget16tls:$RI2),
2306 class CallRIL<string mnemonic, bits<12> opcode>
2307 : InstRILb<opcode, (outs), (ins GR64:$R1, brtarget32tls:$RI2),
2310 class CallRR<string mnemonic, bits<8> opcode>
2311 : InstRR<opcode, (outs), (ins GR64:$R1, ADDR64:$R2),
2314 class CallRX<string mnemonic, bits<8> opcode>
2315 : InstRXa<opcode, (outs), (ins GR64:$R1, (bdxaddr12only $B2, $D2, $X2):$XBD2),
2318 class CondBranchRI<string mnemonic, bits<12> opcode,
2320 : InstRIc<opcode, (outs), (ins cond4:$valid, cond4:$M1, brtarget16:$RI2),
2326 class AsmCondBranchRI<string mnemonic, bits<12> opcode>
2327 : InstRIc<opcode, (outs), (ins imm32zx4:$M1, brtarget16:$RI2),
2330 class FixedCondBranchRI<CondVariant V, string mnemonic, bits<12> opcode,
2332 : InstRIc<opcode, (outs), (ins brtarget16:$RI2),
2339 class CondBranchRIL<string mnemonic, bits<12> opcode>
2340 : InstRILc<opcode, (outs), (ins cond4:$valid, cond4:$M1, brtarget32:$RI2),
2345 class AsmCondBranchRIL<string mnemonic, bits<12> opcode>
2346 : InstRILc<opcode, (outs), (ins imm32zx4:$M1, brtarget32:$RI2),
2349 class FixedCondBranchRIL<CondVariant V, string mnemonic, bits<12> opcode>
2350 : InstRILc<opcode, (outs), (ins brtarget32:$RI2),
2357 class CondBranchRR<string mnemonic, bits<8> opcode>
2358 : InstRR<opcode, (outs), (ins cond4:$valid, cond4:$R1, GR64:$R2),
2363 class AsmCondBranchRR<string mnemonic, bits<8> opcode>
2364 : InstRR<opcode, (outs), (ins imm32zx4:$R1, GR64:$R2),
2367 class NeverCondBranchRR<string mnemonic, bits<8> opcode>
2368 : InstRR<opcode, (outs), (ins GR64:$R2),
2373 class FixedCondBranchRR<CondVariant V, string mnemonic, bits<8> opcode,
2375 : InstRR<opcode, (outs), (ins ADDR64:$R2),
2382 class CondBranchRX<string mnemonic, bits<8> opcode>
2383 : InstRXb<opcode, (outs),
2389 class AsmCondBranchRX<string mnemonic, bits<8> opcode>
2390 : InstRXb<opcode, (outs),
2394 class NeverCondBranchRX<string mnemonic, bits<8> opcode>
2395 : InstRXb<opcode, (outs),
2401 class FixedCondBranchRX<CondVariant V, string mnemonic, bits<8> opcode>
2402 : InstRXb<opcode, (outs), (ins (bdxaddr12only $B2, $D2, $X2):$XBD2),
2409 class CondBranchRXY<string mnemonic, bits<16> opcode>
2410 : InstRXYb<opcode, (outs), (ins cond4:$valid, cond4:$M1,
2417 class AsmCondBranchRXY<string mnemonic, bits<16> opcode>
2418 : InstRXYb<opcode, (outs),
2424 class FixedCondBranchRXY<CondVariant V, string mnemonic, bits<16> opcode,
2426 : InstRXYb<opcode, (outs), (ins (bdxaddr20only $B2, $D2, $X2):$XBD2),
2435 class CmpBranchRIEa<string mnemonic, bits<16> opcode,
2437 : InstRIEa<opcode, (outs), (ins cls:$R1, imm:$I2, cond4:$M3),
2440 class AsmCmpBranchRIEa<string mnemonic, bits<16> opcode,
2442 : InstRIEa<opcode, (outs), (ins cls:$R1, imm:$I2, imm32zx4:$M3),
2445 class FixedCmpBranchRIEa<CondVariant V, string mnemonic, bits<16> opcode,
2447 : InstRIEa<opcode, (outs), (ins cls:$R1, imm:$I2),
2454 multiclass CmpBranchRIEaPair<string mnemonic, bits<16> opcode,
2457 def "" : CmpBranchRIEa<mnemonic, opcode, cls, imm>;
2458 def Asm : AsmCmpBranchRIEa<mnemonic, opcode, cls, imm>;
2461 class CmpBranchRIEb<string mnemonic, bits<16> opcode,
2463 : InstRIEb<opcode, (outs),
2467 class AsmCmpBranchRIEb<string mnemonic, bits<16> opcode,
2469 : InstRIEb<opcode, (outs),
2473 class FixedCmpBranchRIEb<CondVariant V, string mnemonic, bits<16> opcode,
2475 : InstRIEb<opcode, (outs), (ins cls:$R1, cls:$R2, brtarget16:$RI4),
2482 multiclass CmpBranchRIEbPair<string mnemonic, bits<16> opcode,
2485 def "" : CmpBranchRIEb<mnemonic, opcode, cls>;
2486 def Asm : AsmCmpBranchRIEb<mnemonic, opcode, cls>;
2489 class CmpBranchRIEc<string mnemonic, bits<16> opcode,
2491 : InstRIEc<opcode, (outs),
2495 class AsmCmpBranchRIEc<string mnemonic, bits<16> opcode,
2497 : InstRIEc<opcode, (outs),
2501 class FixedCmpBranchRIEc<CondVariant V, string mnemonic, bits<16> opcode,
2503 : InstRIEc<opcode, (outs), (ins cls:$R1, imm:$I2, brtarget16:$RI4),
2510 multiclass CmpBranchRIEcPair<string mnemonic, bits<16> opcode,
2513 def "" : CmpBranchRIEc<mnemonic, opcode, cls, imm>;
2514 def Asm : AsmCmpBranchRIEc<mnemonic, opcode, cls, imm>;
2517 class CmpBranchRRFc<string mnemonic, bits<16> opcode,
2519 : InstRRFc<opcode, (outs), (ins cls:$R1, cls:$R2, cond4:$M3),
2522 class AsmCmpBranchRRFc<string mnemonic, bits<16> opcode,
2524 : InstRRFc<opcode, (outs), (ins cls:$R1, cls:$R2, imm32zx4:$M3),
2527 multiclass CmpBranchRRFcPair<string mnemonic, bits<16> opcode,
2530 def "" : CmpBranchRRFc<mnemonic, opcode, cls>;
2531 def Asm : AsmCmpBranchRRFc<mnemonic, opcode, cls>;
2534 class FixedCmpBranchRRFc<CondVariant V, string mnemonic, bits<16> opcode,
2536 : InstRRFc<opcode, (outs), (ins cls:$R1, cls:$R2),
2543 class CmpBranchRRS<string mnemonic, bits<16> opcode,
2545 : InstRRS<opcode, (outs),
2549 class AsmCmpBranchRRS<string mnemonic, bits<16> opcode,
2551 : InstRRS<opcode, (outs),
2555 class FixedCmpBranchRRS<CondVariant V, string mnemonic, bits<16> opcode,
2557 : InstRRS<opcode, (outs),
2565 multiclass CmpBranchRRSPair<string mnemonic, bits<16> opcode,
2568 def "" : CmpBranchRRS<mnemonic, opcode, cls>;
2569 def Asm : AsmCmpBranchRRS<mnemonic, opcode, cls>;
2572 class CmpBranchRIS<string mnemonic, bits<16> opcode,
2574 : InstRIS<opcode, (outs),
2578 class AsmCmpBranchRIS<string mnemonic, bits<16> opcode,
2580 : InstRIS<opcode, (outs),
2584 class FixedCmpBranchRIS<CondVariant V, string mnemonic, bits<16> opcode,
2586 : InstRIS<opcode, (outs),
2594 multiclass CmpBranchRISPair<string mnemonic, bits<16> opcode,
2597 def "" : CmpBranchRIS<mnemonic, opcode, cls, imm>;
2598 def Asm : AsmCmpBranchRIS<mnemonic, opcode, cls, imm>;
2601 class CmpBranchRSYb<string mnemonic, bits<16> opcode,
2603 : InstRSYb<opcode, (outs),
2607 class AsmCmpBranchRSYb<string mnemonic, bits<16> opcode,
2609 : InstRSYb<opcode, (outs),
2613 multiclass CmpBranchRSYbPair<string mnemonic, bits<16> opcode,
2616 def "" : CmpBranchRSYb<mnemonic, opcode, cls>;
2617 def Asm : AsmCmpBranchRSYb<mnemonic, opcode, cls>;
2620 class FixedCmpBranchRSYb<CondVariant V, string mnemonic, bits<16> opcode,
2622 : InstRSYb<opcode, (outs), (ins cls:$R1, (bdaddr20only $B2, $D2):$BD2),
2629 class BranchUnaryRI<string mnemonic, bits<12> opcode, RegisterOperand cls>
2630 : InstRIb<opcode, (outs cls:$R1), (ins cls:$R1src, brtarget16:$RI2),
2636 class BranchUnaryRIL<string mnemonic, bits<12> opcode, RegisterOperand cls>
2637 : InstRILb<opcode, (outs cls:$R1), (ins cls:$R1src, brtarget32:$RI2),
2643 class BranchUnaryRR<string mnemonic, bits<8> opcode, RegisterOperand cls>
2644 : InstRR<opcode, (outs cls:$R1), (ins cls:$R1src, GR64:$R2),
2650 class BranchUnaryRRE<string mnemonic, bits<16> opcode, RegisterOperand cls>
2651 : InstRRE<opcode, (outs cls:$R1), (ins cls:$R1src, GR64:$R2),
2657 class BranchUnaryRX<string mnemonic, bits<8> opcode, RegisterOperand cls>
2658 : InstRXa<opcode, (outs cls:$R1),
2665 class BranchUnaryRXY<string mnemonic, bits<16> opcode, RegisterOperand cls>
2666 : InstRXYa<opcode, (outs cls:$R1),
2673 class BranchBinaryRSI<string mnemonic, bits<8> opcode, RegisterOperand cls>
2674 : InstRSI<opcode, (outs cls:$R1), (ins cls:$R1src, cls:$R3, brtarget16:$RI2),
2680 class BranchBinaryRIEe<string mnemonic, bits<16> opcode, RegisterOperand cls>
2681 : InstRIEe<opcode, (outs cls:$R1),
2688 class BranchBinaryRS<string mnemonic, bits<8> opcode, RegisterOperand cls>
2689 : InstRSa<opcode, (outs cls:$R1),
2696 class BranchBinaryRSY<string mnemonic, bits<16> opcode, RegisterOperand cls>
2697 : InstRSYa<opcode,
2705 class LoadMultipleRS<string mnemonic, bits<8> opcode, RegisterOperand cls,
2707 : InstRSa<opcode, (outs cls:$R1, cls:$R3), (ins (mode $B2, $D2):$BD2),
2712 class LoadMultipleRSY<string mnemonic, bits<16> opcode, RegisterOperand cls,
2714 : InstRSYa<opcode, (outs cls:$R1, cls:$R3), (ins (mode $B2, $D2):$BD2),
2729 class LoadMultipleSSe<string mnemonic, bits<8> opcode, RegisterOperand cls>
2730 : InstSSe<opcode, (outs cls:$R1, cls:$R3),
2736 multiclass LoadMultipleVRSaAlign<string mnemonic, bits<16> opcode> {
2738 def Align : InstVRSa<opcode, (outs VR128:$V1, VR128:$V3),
2742 def "" : InstVRSa<opcode, (outs VR128:$V1, VR128:$V3),
2748 class StoreRILPC<string mnemonic, bits<12> opcode, SDPatternOperator operator,
2750 : InstRILb<opcode, (outs), (ins cls:$R1, pcrel32:$RI2),
2760 class StoreRX<string mnemonic, bits<8> opcode, SDPatternOperator operator,
2763 : InstRXa<opcode, (outs), (ins cls:$R1, (mode $B2, $D2, $X2):$XBD2),
2772 class StoreRXY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
2775 : InstRXYa<opcode, (outs), (ins cls:$R1, (mode $B2, $D2, $X2):$XBD2),
2796 class StoreVRX<string mnemonic, bits<16> opcode, SDPatternOperator operator,
2798 : InstVRX<opcode, (outs),
2807 class StoreVRXGeneric<string mnemonic, bits<16> opcode>
2808 : InstVRX<opcode, (outs),
2814 multiclass StoreVRXAlign<string mnemonic, bits<16> opcode> {
2816 def Align : InstVRX<opcode, (outs),
2821 def "" : InstVRX<opcode, (outs),
2827 class StoreLengthVRSb<string mnemonic, bits<16> opcode,
2829 : InstVRSb<opcode, (outs),
2838 class StoreLengthVRSd<string mnemonic, bits<16> opcode,
2840 : InstVRSd<opcode, (outs),
2848 class StoreLengthVSI<string mnemonic, bits<16> opcode,
2850 : InstVSI<opcode, (outs),
2858 class StoreMultipleRS<string mnemonic, bits<8> opcode, RegisterOperand cls,
2860 : InstRSa<opcode, (outs), (ins cls:$R1, cls:$R3, (mode $B2, $D2):$BD2),
2865 class StoreMultipleRSY<string mnemonic, bits<16> opcode, RegisterOperand cls,
2867 : InstRSYa<opcode, (outs), (ins cls:$R1, cls:$R3, (mode $B2, $D2):$BD2),
2882 multiclass StoreMultipleVRSaAlign<string mnemonic, bits<16> opcode> {
2884 def Align : InstVRSa<opcode, (outs), (ins VR128:$V1, VR128:$V3,
2889 def "" : InstVRSa<opcode, (outs), (ins VR128:$V1, VR128:$V3,
2901 class StoreSI<string mnemonic, bits<8> opcode, SDPatternOperator operator,
2903 : InstSI<opcode, (outs), (ins (mviaddr12pair $B1, $D1):$BD1, imm:$I2),
2909 class StoreSIY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
2911 : InstSIY<opcode, (outs), (ins (mviaddr20pair $B1, $D1):$BD1, imm:$I2),
2917 class StoreSIL<string mnemonic, bits<16> opcode, SDPatternOperator operator,
2919 : InstSIL<opcode, (outs), (ins (mviaddr12pair $B1, $D1):$BD1, imm:$I2),
2935 class StoreSSE<string mnemonic, bits<16> opcode>
2936 : InstSSE<opcode, (outs),
2942 class CondStoreRSY<string mnemonic, bits<16> opcode,
2945 : InstRSYb<opcode, (outs),
2955 class AsmCondStoreRSY<string mnemonic, bits<16> opcode,
2958 : InstRSYb<opcode, (outs), (ins cls:$R1, (mode $B2, $D2):$BD2, imm32zx4:$M3),
2965 class FixedCondStoreRSY<CondVariant V, string mnemonic, bits<16> opcode,
2968 : InstRSYb<opcode, (outs), (ins cls:$R1, (mode $B2, $D2):$BD2),
2977 multiclass CondStoreRSYPair<string mnemonic, bits<16> opcode,
2981 def "" : CondStoreRSY<mnemonic, opcode, cls, bytes, mode>;
2982 def Asm : AsmCondStoreRSY<mnemonic, opcode, cls, bytes, mode>;
2985 class SideEffectUnaryI<string mnemonic, bits<8> opcode, ImmOpWithPattern imm>
2986 : InstI<opcode, (outs), (ins imm:$I1),
2989 class SideEffectUnaryRR<string mnemonic, bits<8>opcode, RegisterOperand cls>
2990 : InstRR<opcode, (outs), (ins cls:$R1),
2995 class SideEffectUnaryRRE<string mnemonic, bits<16> opcode, RegisterOperand cls,
2997 : InstRRE<opcode, (outs), (ins cls:$R1),
3002 class SideEffectUnaryS<string mnemonic, bits<16> opcode,
3005 : InstS<opcode, (outs), (ins (mode $B2, $D2):$BD2),
3011 class SideEffectUnarySIY<string mnemonic, bits<16> opcode,
3014 : InstSIY<opcode, (outs), (ins (mode $B1, $D1):$BD1),
3021 class SideEffectAddressS<string mnemonic, bits<16> opcode,
3024 : InstS<opcode, (outs), (ins (mode $B2, $D2):$BD2),
3027 class LoadAddressRX<string mnemonic, bits<8> opcode,
3029 : InstRXa<opcode, (outs GR64:$R1), (ins (mode $B2, $D2, $X2):$XBD2),
3033 class LoadAddressRXY<string mnemonic, bits<16> opcode,
3035 : InstRXYa<opcode, (outs GR64:$R1), (ins (mode $B2, $D2, $X2):$XBD2),
3049 class LoadAddressRIL<string mnemonic, bits<12> opcode,
3051 : InstRILb<opcode, (outs GR64:$R1), (ins pcrel32:$RI2),
3055 class UnaryRR<string mnemonic, bits<8> opcode, SDPatternOperator operator,
3057 : InstRR<opcode, (outs cls1:$R1), (ins cls2:$R2),
3064 class UnaryRRE<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3066 : InstRRE<opcode, (outs cls1:$R1), (ins cls2:$R2),
3073 class UnaryTiedRRE<string mnemonic, bits<16> opcode, RegisterOperand cls>
3074 : InstRRE<opcode, (outs cls:$R1), (ins cls:$R1src),
3081 class UnaryMemRRFc<string mnemonic, bits<16> opcode,
3083 : InstRRFc<opcode, (outs cls2:$R2, cls1:$R1), (ins cls1:$R1src),
3090 class UnaryRI<string mnemonic, bits<12> opcode, SDPatternOperator operator,
3092 : InstRIa<opcode, (outs cls:$R1), (ins imm:$I2),
3096 class UnaryRIL<string mnemonic, bits<12> opcode, SDPatternOperator operator,
3098 : InstRILa<opcode, (outs cls:$R1), (ins imm:$I2),
3102 class UnaryRILPC<string mnemonic, bits<12> opcode, SDPatternOperator operator,
3104 : InstRILb<opcode, (outs cls:$R1), (ins pcrel32:$RI2),
3114 class CondUnaryRSY<string mnemonic, bits<16> opcode,
3117 : InstRSYb<opcode, (outs cls:$R1),
3136 class AsmCondUnaryRSY<string mnemonic, bits<16> opcode,
3139 : InstRSYb<opcode, (outs cls:$R1),
3149 class FixedCondUnaryRSY<CondVariant V, string mnemonic, bits<16> opcode,
3152 : InstRSYb<opcode, (outs cls:$R1), (ins cls:$R1src, (mode $B2, $D2):$BD2),
3163 multiclass CondUnaryRSYPair<string mnemonic, bits<16> opcode,
3168 def "" : CondUnaryRSY<mnemonic, opcode, operator, cls, bytes, mode>;
3169 def Asm : AsmCondUnaryRSY<mnemonic, opcode, cls, bytes, mode>;
3172 class UnaryRX<string mnemonic, bits<8> opcode, SDPatternOperator operator,
3175 : InstRXa<opcode, (outs cls:$R1), (ins (mode $B2, $D2, $X2):$XBD2),
3184 class UnaryRXE<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3186 : InstRXE<opcode, (outs cls:$R1), (ins (bdxaddr12only $B2, $D2, $X2):$XBD2),
3196 class UnaryRXY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3199 : InstRXYa<opcode, (outs cls:$R1), (ins (mode $B2, $D2, $X2):$XBD2),
3220 class UnaryVRIa<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3222 : InstVRIa<opcode, (outs tr.op:$V1), (ins imm:$I2),
3228 class UnaryVRIaGeneric<string mnemonic, bits<16> opcode, ImmOpWithPattern imm>
3229 : InstVRIa<opcode, (outs VR128:$V1), (ins imm:$I2, imm32zx4:$M3),
3232 class UnaryVRRa<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3235 : InstVRRa<opcode, (outs tr1.op:$V1), (ins tr2.op:$V2),
3245 class UnaryVRRaGeneric<string mnemonic, bits<16> opcode, bits<4> m4 = 0,
3247 : InstVRRa<opcode, (outs VR128:$V1), (ins VR128:$V2, imm32zx4:$M3),
3253 class UnaryVRRaFloatGeneric<string mnemonic, bits<16> opcode, bits<4> m5 = 0>
3254 : InstVRRa<opcode, (outs VR128:$V1),
3264 multiclass UnaryExtraVRRaSPair<string mnemonic, bits<16> opcode,
3269 def "" : InstVRRa<opcode, (outs tr1.op:$V1),
3277 def S : UnaryVRRa<mnemonic#"s", opcode, operator_cc, tr1, tr2,
3281 multiclass UnaryExtraVRRaSPairGeneric<string mnemonic, bits<16> opcode> {
3283 def "" : InstVRRa<opcode, (outs VR128:$V1),
3291 class UnaryVRX<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3293 : InstVRX<opcode, (outs tr.op:$V1), (ins (bdxaddr12only $B2, $D2, $X2):$XBD2),
3301 class UnaryVRXGeneric<string mnemonic, bits<16> opcode>
3302 : InstVRX<opcode, (outs VR128:$V1),
3308 multiclass UnaryVRXAlign<string mnemonic, bits<16> opcode> {
3310 def Align : InstVRX<opcode, (outs VR128:$V1),
3314 def "" : InstVRX<opcode, (outs VR128:$V1),
3320 class SideEffectBinaryRX<string mnemonic, bits<8> opcode,
3322 : InstRXa<opcode, (outs), (ins cls:$R1, (bdxaddr12only $B2, $D2, $X2):$XBD2),
3325 class SideEffectBinaryRXY<string mnemonic, bits<16> opcode,
3327 : InstRXYa<opcode, (outs), (ins cls:$R1, (bdxaddr20only $B2, $D2, $X2):$XBD2),
3330 class SideEffectBinaryRILPC<string mnemonic, bits<12> opcode,
3332 : InstRILb<opcode, (outs), (ins cls:$R1, pcrel32:$RI2),
3340 class SideEffectBinaryRRE<string mnemonic, bits<16> opcode,
3342 : InstRRE<opcode, (outs), (ins cls1:$R1, cls2:$R2),
3345 class SideEffectBinaryRRFa<string mnemonic, bits<16> opcode,
3347 : InstRRFa<opcode, (outs), (ins cls1:$R1, cls2:$R2),
3353 class SideEffectBinaryRRFc<string mnemonic, bits<16> opcode,
3355 : InstRRFc<opcode, (outs), (ins cls1:$R1, cls2:$R2),
3360 class SideEffectBinaryIE<string mnemonic, bits<16> opcode,
3362 : InstIE<opcode, (outs), (ins imm1:$I1, imm2:$I2),
3365 class SideEffectBinarySI<string mnemonic, bits<8> opcode, Operand imm>
3366 : InstSI<opcode, (outs), (ins (bdaddr12only $B1, $D1):$BD1, imm:$I2),
3369 class SideEffectBinarySIL<string mnemonic, bits<16> opcode,
3371 : InstSIL<opcode, (outs), (ins (bdaddr12only $B1, $D1):$BD1, imm:$I2),
3374 class SideEffectBinarySSa<string mnemonic, bits<8> opcode>
3375 : InstSSa<opcode, (outs), (ins (bdladdr12onlylen8 $B1, $D1, $L1):$BDL1,
3379 class SideEffectBinarySSb<string mnemonic, bits<8> opcode>
3380 : InstSSb<opcode,
3385 class SideEffectBinarySSf<string mnemonic, bits<8> opcode>
3386 : InstSSf<opcode, (outs), (ins (bdaddr12only $B1, $D1):$BD1,
3390 class SideEffectBinarySSE<string mnemonic, bits<16> opcode>
3391 : InstSSE<opcode, (outs),
3395 class SideEffectBinaryMemMemRR<string mnemonic, bits<8> opcode,
3397 : InstRR<opcode, (outs cls1:$R1, cls2:$R2), (ins cls1:$R1src, cls2:$R2src),
3403 class SideEffectBinaryMemRRE<string mnemonic, bits<16> opcode,
3405 : InstRRE<opcode, (outs cls2:$R2), (ins cls1:$R1, cls2:$R2src),
3411 class SideEffectBinaryMemMemRRE<string mnemonic, bits<16> opcode,
3413 : InstRRE<opcode, (outs cls1:$R1, cls2:$R2), (ins cls1:$R1src, cls2:$R2src),
3419 class SideEffectBinaryMemMemRRFc<string mnemonic, bits<16> opcode,
3421 : InstRRFc<opcode, (outs cls1:$R1, cls2:$R2), (ins cls1:$R1src, cls2:$R2src),
3428 class BinaryRR<string mnemonic, bits<8> opcode, SDPatternOperator operator,
3430 : InstRR<opcode, (outs cls1:$R1), (ins cls1:$R1src, cls2:$R2),
3439 class BinaryRRE<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3441 : InstRRE<opcode, (outs cls1:$R1), (ins cls1:$R1src, cls2:$R2),
3450 class BinaryRRD<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3452 : InstRRD<opcode, (outs cls1:$R1), (ins cls2:$R3, cls2:$R2),
3459 class BinaryRRFa<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3462 : InstRRFa<opcode, (outs cls1:$R1), (ins cls2:$R2, cls3:$R3),
3471 class UnaryRRFa<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3473 : InstRRFa<opcode, (outs cls1:$R1), (ins cls2:$R2, cls2:$R3),
3507 class BinaryRRFb<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3510 : InstRRFb<opcode, (outs cls1:$R1), (ins cls2:$R2, cls3:$R3),
3516 class BinaryRRFc<string mnemonic, bits<16> opcode,
3518 : InstRRFc<opcode, (outs cls1:$R1), (ins cls2:$R2, imm32zx4:$M3),
3521 class BinaryMemRRFc<string mnemonic, bits<16> opcode,
3523 : InstRRFc<opcode, (outs cls2:$R2, cls1:$R1), (ins cls1:$R1src, imm:$M3),
3529 multiclass BinaryMemRRFcOpt<string mnemonic, bits<16> opcode,
3531 def "" : BinaryMemRRFc<mnemonic, opcode, cls1, cls2, imm32zx4>;
3532 def Opt : UnaryMemRRFc<mnemonic, opcode, cls1, cls2>;
3535 class BinaryRRFd<string mnemonic, bits<16> opcode, RegisterOperand cls1,
3537 : InstRRFd<opcode, (outs cls1:$R1), (ins cls2:$R2, imm32zx4:$M4),
3540 class BinaryRRFe<string mnemonic, bits<16> opcode, RegisterOperand cls1,
3542 : InstRRFe<opcode, (outs cls1:$R1), (ins imm32zx4:$M3, cls2:$R2),
3547 class CondBinaryRRF<string mnemonic, bits<16> opcode, RegisterOperand cls1,
3549 : InstRRFc<opcode, (outs cls1:$R1),
3565 class AsmCondBinaryRRF<string mnemonic, bits<16> opcode, RegisterOperand cls1,
3567 : InstRRFc<opcode, (outs cls1:$R1),
3575 class FixedCondBinaryRRF<CondVariant V, string mnemonic, bits<16> opcode,
3577 : InstRRFc<opcode, (outs cls1:$R1), (ins cls1:$R1src, cls2:$R2),
3586 multiclass CondBinaryRRFPair<string mnemonic, bits<16> opcode,
3589 def "" : CondBinaryRRF<mnemonic, opcode, cls1, cls2>;
3590 def Asm : AsmCondBinaryRRF<mnemonic, opcode, cls1, cls2>;
3593 class CondBinaryRRFa<string mnemonic, bits<16> opcode, RegisterOperand cls1,
3595 : InstRRFa<opcode, (outs cls1:$R1),
3609 class AsmCondBinaryRRFa<string mnemonic, bits<16> opcode, RegisterOperand cls1,
3611 : InstRRFa<opcode, (outs cls1:$R1), (ins cls3:$R3, cls2:$R2, imm32zx4:$M4),
3615 class FixedCondBinaryRRFa<CondVariant V, string mnemonic, bits<16> opcode,
3618 : InstRRFa<opcode, (outs cls1:$R1), (ins cls3:$R3, cls2:$R2),
3625 multiclass CondBinaryRRFaPair<string mnemonic, bits<16> opcode,
3629 def "" : CondBinaryRRFa<mnemonic, opcode, cls1, cls2, cls3>;
3630 def Asm : AsmCondBinaryRRFa<mnemonic, opcode, cls1, cls2, cls3>;
3633 class BinaryRI<string mnemonic, bits<12> opcode, SDPatternOperator operator,
3635 : InstRIa<opcode, (outs cls:$R1), (ins cls:$R1src, imm:$I2),
3642 class BinaryRIE<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3644 : InstRIEd<opcode, (outs cls:$R1), (ins cls:$R3, imm:$I2),
3660 class CondBinaryRIE<string mnemonic, bits<16> opcode, RegisterOperand cls,
3662 : InstRIEg<opcode, (outs cls:$R1),
3674 class AsmCondBinaryRIE<string mnemonic, bits<16> opcode, RegisterOperand cls,
3676 : InstRIEg<opcode, (outs cls:$R1),
3684 class FixedCondBinaryRIE<CondVariant V, string mnemonic, bits<16> opcode,
3686 : InstRIEg<opcode, (outs cls:$R1), (ins cls:$R1src, imm:$I2),
3695 multiclass CondBinaryRIEPair<string mnemonic, bits<16> opcode,
3698 def "" : CondBinaryRIE<mnemonic, opcode, cls, imm>;
3699 def Asm : AsmCondBinaryRIE<mnemonic, opcode, cls, imm>;
3702 class BinaryRIL<string mnemonic, bits<12> opcode, SDPatternOperator operator,
3704 : InstRILa<opcode, (outs cls:$R1), (ins cls:$R1src, imm:$I2),
3711 class BinaryRS<string mnemonic, bits<8> opcode, SDPatternOperator operator,
3713 : InstRSa<opcode, (outs cls:$R1),
3722 class BinaryRSY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3724 : InstRSYa<opcode, (outs cls:$R1), (ins cls:$R3, (shift20only $B2, $D2):$BD2),
3739 class BinaryRSL<string mnemonic, bits<16> opcode, RegisterOperand cls>
3740 : InstRSLb<opcode, (outs cls:$R1),
3746 class BinaryRX<string mnemonic, bits<8> opcode, SDPatternOperator operator,
3749 : InstRXa<opcode, (outs cls:$R1), (ins cls:$R1src, (mode $B2, $D2, $X2):$XBD2),
3760 class BinaryRXE<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3762 : InstRXE<opcode, (outs cls:$R1),
3776 class BinaryRXF<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3779 : InstRXF<opcode, (outs cls1:$R1),
3789 class BinaryRXY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3792 : InstRXYa<opcode, (outs cls:$R1),
3817 class BinarySI<string mnemonic, bits<8> opcode, SDPatternOperator operator,
3819 : InstSI<opcode, (outs), (ins (mode $B1, $D1):$BD1, imm:$I2),
3826 class BinarySIY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3828 : InstSIY<opcode, (outs), (ins (mode $B1, $D1):$BD1, imm:$I2),
3846 class BinarySSF<string mnemonic, bits<12> opcode, RegisterOperand cls>
3847 : InstSSF<opcode, (outs cls:$R3),
3853 class BinaryVRIb<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3855 : InstVRIb<opcode, (outs tr.op:$V1), (ins imm32zx8:$I2, imm32zx8:$I3),
3861 class BinaryVRIbGeneric<string mnemonic, bits<16> opcode>
3862 : InstVRIb<opcode, (outs VR128:$V1),
3866 class BinaryVRIc<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3868 : InstVRIc<opcode, (outs tr1.op:$V1), (ins tr2.op:$V3, imm32zx16:$I2),
3875 class BinaryVRIcGeneric<string mnemonic, bits<16> opcode>
3876 : InstVRIc<opcode, (outs VR128:$V1),
3880 class BinaryVRIe<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3882 : InstVRIe<opcode, (outs tr1.op:$V1), (ins tr2.op:$V2, imm32zx12:$I3),
3890 class BinaryVRIeFloatGeneric<string mnemonic, bits<16> opcode>
3891 : InstVRIe<opcode, (outs VR128:$V1),
3895 class BinaryVRIh<string mnemonic, bits<16> opcode>
3896 : InstVRIh<opcode, (outs VR128:$V1),
3900 class BinaryVRRa<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3902 : InstVRRa<opcode, (outs tr1.op:$V1), (ins tr2.op:$V2, imm32zx4:$M5),
3910 class BinaryVRRaFloatGeneric<string mnemonic, bits<16> opcode>
3911 : InstVRRa<opcode, (outs VR128:$V1),
3915 class BinaryVRRb<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3918 : InstVRRb<opcode, (outs tr1.op:$V1), (ins tr2.op:$V2, tr2.op:$V3),
3926 class BinaryExtraVRRb<string mnemonic, bits<16> opcode, bits<4> type = 0>
3927 : InstVRRb<opcode, (outs VR128:$V1), (ins VR128:$V2, VR128:$V3, imm32zx4:$M5),
3932 class BinaryExtraVRRbGeneric<string mnemonic, bits<16> opcode>
3933 : InstVRRb<opcode, (outs VR128:$V1),
3939 multiclass BinaryVRRbSPair<string mnemonic, bits<16> opcode,
3943 def "" : BinaryVRRb<mnemonic, opcode, operator, tr1, tr2, type,
3946 def S : BinaryVRRb<mnemonic#"s", opcode, operator_cc, tr1, tr2, type,
3950 class BinaryVRRbSPairGeneric<string mnemonic, bits<16> opcode>
3951 : InstVRRb<opcode, (outs VR128:$V1),
3961 multiclass BinaryExtraVRRbSPair<string mnemonic, bits<16> opcode,
3966 def "" : InstVRRb<opcode, (outs tr1.op:$V1),
3975 def S : BinaryVRRb<mnemonic#"s", opcode, operator_cc, tr1, tr2, type, 1>;
3978 multiclass BinaryExtraVRRbSPairGeneric<string mnemonic, bits<16> opcode> {
3980 def "" : InstVRRb<opcode, (outs VR128:$V1),
3988 class BinaryVRRc<string mnemonic, bits<16> opcode, SDPatternOperator operator,
3991 : InstVRRc<opcode, (outs tr1.op:$V1), (ins tr2.op:$V2, tr2.op:$V3),
4002 class BinaryVRRcGeneric<string mnemonic, bits<16> opcode, bits<4> m5 = 0,
4004 : InstVRRc<opcode, (outs VR128:$V1),
4011 class BinaryVRRcFloatGeneric<string mnemonic, bits<16> opcode, bits<4> m6 = 0>
4012 : InstVRRc<opcode, (outs VR128:$V1),
4020 multiclass BinaryVRRcSPair<string mnemonic, bits<16> opcode,
4025 def "" : BinaryVRRc<mnemonic, opcode, operator, tr1, tr2, type,
4028 def S : BinaryVRRc<mnemonic#"s", opcode, operator_cc, tr1, tr2, type,
4032 class BinaryVRRcSPairFloatGeneric<string mnemonic, bits<16> opcode>
4033 : InstVRRc<opcode, (outs VR128:$V1),
4038 class BinaryVRRf<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4040 : InstVRRf<opcode, (outs tr.op:$V1), (ins GR64:$R2, GR64:$R3),
4044 class BinaryVRRi<string mnemonic, bits<16> opcode, RegisterOperand cls>
4045 : InstVRRi<opcode, (outs cls:$R1), (ins VR128:$V2, imm32zx4:$M3),
4050 class BinaryVRRk<string mnemonic, bits<16> opcode>
4051 : InstVRRk<opcode, (outs VR128:$V1), (ins VR128:$V2, imm32zx4:$M3),
4054 class BinaryVRSa<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4056 : InstVRSa<opcode, (outs tr1.op:$V1),
4064 class BinaryVRSaGeneric<string mnemonic, bits<16> opcode>
4065 : InstVRSa<opcode, (outs VR128:$V1),
4069 class BinaryVRSb<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4071 : InstVRSb<opcode, (outs VR128:$V1),
4080 class BinaryVRSc<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4082 : InstVRSc<opcode, (outs GR64:$R1),
4089 class BinaryVRScGeneric<string mnemonic, bits<16> opcode>
4090 : InstVRSc<opcode, (outs GR64:$R1),
4094 class BinaryVRSd<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4096 : InstVRSd<opcode, (outs VR128:$V1),
4104 class BinaryVRX<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4106 : InstVRX<opcode, (outs VR128:$V1),
4115 class StoreBinaryRS<string mnemonic, bits<8> opcode, RegisterOperand cls,
4117 : InstRSb<opcode, (outs), (ins cls:$R1, imm32zx4:$M3, (mode $B2, $D2):$BD2),
4123 class StoreBinaryRSY<string mnemonic, bits<16> opcode, RegisterOperand cls,
4125 : InstRSYb<opcode, (outs), (ins cls:$R1, imm32zx4:$M3, (mode $B2, $D2):$BD2),
4143 class StoreBinaryRSL<string mnemonic, bits<16> opcode, RegisterOperand cls>
4144 : InstRSLb<opcode, (outs),
4151 class BinaryVSI<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4153 : InstVSI<opcode, (outs VR128:$V1),
4161 class StoreBinaryVRV<string mnemonic, bits<16> opcode, bits<5> bytes,
4163 : InstVRV<opcode, (outs),
4170 class StoreBinaryVRX<string mnemonic, bits<16> opcode,
4173 : InstVRX<opcode, (outs),
4181 class MemoryBinarySSd<string mnemonic, bits<8> opcode,
4183 : InstSSd<opcode, (outs),
4188 class CompareRR<string mnemonic, bits<8> opcode, SDPatternOperator operator,
4190 : InstRR<opcode, (outs), (ins cls1:$R1, cls2:$R2),
4198 class CompareRRE<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4200 : InstRRE<opcode, (outs), (ins cls1:$R1, cls2:$R2),
4208 class CompareRI<string mnemonic, bits<12> opcode, SDPatternOperator operator,
4210 : InstRIa<opcode, (outs), (ins cls:$R1, imm:$I2),
4216 class CompareRIL<string mnemonic, bits<12> opcode, SDPatternOperator operator,
4218 : InstRILa<opcode, (outs), (ins cls:$R1, imm:$I2),
4224 class CompareRILPC<string mnemonic, bits<12> opcode, SDPatternOperator operator,
4226 : InstRILb<opcode, (outs), (ins cls:$R1, pcrel32:$RI2),
4237 class CompareRX<string mnemonic, bits<8> opcode, SDPatternOperator operator,
4240 : InstRXa<opcode, (outs), (ins cls:$R1, (mode $B2, $D2, $X2):$XBD2),
4250 class CompareRXE<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4252 : InstRXE<opcode, (outs), (ins cls:$R1, (bdxaddr12only $B2, $D2, $X2):$XBD2),
4263 class CompareRXY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4266 : InstRXYa<opcode, (outs), (ins cls:$R1, (mode $B2, $D2, $X2):$XBD2),
4289 class CompareRS<string mnemonic, bits<8> opcode, RegisterOperand cls,
4291 : InstRSb<opcode, (outs), (ins cls:$R1, imm32zx4:$M3, (mode $B2, $D2):$BD2),
4297 class CompareRSY<string mnemonic, bits<16> opcode, RegisterOperand cls,
4299 : InstRSYb<opcode, (outs), (ins cls:$R1, imm32zx4:$M3, (mode $B2, $D2):$BD2),
4315 class CompareSSb<string mnemonic, bits<8> opcode>
4316 : InstSSb<opcode,
4324 class CompareSI<string mnemonic, bits<8> opcode, SDPatternOperator operator,
4327 : InstSI<opcode, (outs), (ins (mode $B1, $D1):$BD1, imm:$I2),
4334 class CompareSIL<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4336 : InstSIL<opcode, (outs), (ins (bdaddr12only $B1, $D1):$BD1, imm:$I2),
4343 class CompareSIY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4346 : InstSIY<opcode, (outs), (ins (mode $B1, $D1):$BD1, imm:$I2),
4365 class CompareVRRa<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4367 : InstVRRa<opcode, (outs), (ins tr.op:$V1, tr.op:$V2),
4378 class CompareVRRaGeneric<string mnemonic, bits<16> opcode>
4379 : InstVRRa<opcode, (outs), (ins VR128:$V1, VR128:$V2, imm32zx4:$M3),
4386 class CompareVRRaFloatGeneric<string mnemonic, bits<16> opcode>
4387 : InstVRRa<opcode, (outs),
4394 class CompareVRRh<string mnemonic, bits<16> opcode>
4395 : InstVRRh<opcode, (outs), (ins VR128:$V1, VR128:$V2, imm32zx4:$M3),
4400 class TestInherentS<string mnemonic, bits<16> opcode,
4402 : InstS<opcode, (outs), (ins), mnemonic, [(set CC, (operator))]> {
4407 class TestRXE<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4409 : InstRXE<opcode, (outs), (ins cls:$R1, (bdxaddr12only $B2, $D2, $X2):$XBD2),
4415 class TestBinarySIL<string mnemonic, bits<16> opcode,
4417 : InstSIL<opcode, (outs), (ins (bdaddr12only $B1, $D1):$BD1, imm:$I2),
4421 class TestRSL<string mnemonic, bits<16> opcode>
4422 : InstRSLa<opcode, (outs), (ins (bdladdr12onlylen4 $B1, $D1, $L1):$BDL1),
4427 class TestVRRg<string mnemonic, bits<16> opcode>
4428 : InstVRRg<opcode, (outs), (ins VR128:$V1),
4431 class SideEffectTernarySSc<string mnemonic, bits<8> opcode>
4432 : InstSSc<opcode, (outs), (ins (bdladdr12onlylen4 $B1, $D1, $L1):$BDL1,
4436 class SideEffectTernaryRRFa<string mnemonic, bits<16> opcode,
4439 : InstRRFa<opcode, (outs), (ins cls1:$R1, cls2:$R2, cls3:$R3),
4444 class SideEffectTernaryMemMemRRFa<string mnemonic, bits<16> opcode,
4447 : InstRRFa<opcode, (outs cls1:$R1, cls2:$R2),
4455 class SideEffectTernaryRRFb<string mnemonic, bits<16> opcode,
4458 : InstRRFb<opcode, (outs), (ins cls1:$R1, cls2:$R2, cls3:$R3),
4463 class SideEffectTernaryMemMemMemRRFb<string mnemonic, bits<16> opcode,
4467 : InstRRFb<opcode, (outs cls1:$R1, cls2:$R2, cls3:$R3),
4475 class SideEffectTernaryRRFc<string mnemonic, bits<16> opcode,
4478 : InstRRFc<opcode, (outs), (ins cls1:$R1, cls2:$R2, imm:$M3),
4481 multiclass SideEffectTernaryRRFcOpt<string mnemonic, bits<16> opcode,
4484 def "" : SideEffectTernaryRRFc<mnemonic, opcode, cls1, cls2, imm32zx4>;
4485 def Opt : SideEffectBinaryRRFc<mnemonic, opcode, cls1, cls2>;
4488 class SideEffectTernaryMemMemRRFc<string mnemonic, bits<16> opcode,
4491 : InstRRFc<opcode, (outs cls1:$R1, cls2:$R2),
4498 multiclass SideEffectTernaryMemMemRRFcOpt<string mnemonic, bits<16> opcode,
4501 def "" : SideEffectTernaryMemMemRRFc<mnemonic, opcode, cls1, cls2, imm32zx4>;
4502 def Opt : SideEffectBinaryMemMemRRFc<mnemonic, opcode, cls1, cls2>;
4505 class SideEffectTernarySSF<string mnemonic, bits<12> opcode,
4507 : InstSSF<opcode, (outs),
4512 class TernaryRRFa<string mnemonic, bits<16> opcode,
4515 : InstRRFa<opcode, (outs cls1:$R1), (ins cls2:$R2, cls3:$R3, imm32zx4:$M4),
4518 class TernaryRRFb<string mnemonic, bits<16> opcode,
4521 : InstRRFb<opcode, (outs cls1:$R1, cls3:$R3),
4528 class TernaryRRFe<string mnemonic, bits<16> opcode, RegisterOperand cls1,
4530 : InstRRFe<opcode, (outs cls1:$R1),
4534 class TernaryRRD<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4536 : InstRRD<opcode, (outs cls1:$R1), (ins cls2:$R1src, cls2:$R3, cls2:$R2),
4545 class TernaryRS<string mnemonic, bits<8> opcode, RegisterOperand cls,
4547 : InstRSb<opcode, (outs cls:$R1),
4557 class TernaryRSY<string mnemonic, bits<16> opcode, RegisterOperand cls,
4559 : InstRSYb<opcode, (outs cls:$R1),
4579 class SideEffectTernaryRS<string mnemonic, bits<8> opcode,
4581 : InstRSa<opcode, (outs),
4585 class SideEffectTernaryRSY<string mnemonic, bits<16> opcode,
4587 : InstRSYa<opcode, (outs),
4591 class SideEffectTernaryMemMemRS<string mnemonic, bits<8> opcode,
4593 : InstRSa<opcode, (outs cls1:$R1, cls2:$R3),
4600 class SideEffectTernaryMemMemRSY<string mnemonic, bits<16> opcode,
4602 : InstRSYa<opcode, (outs cls1:$R1, cls2:$R3),
4609 class TernaryRXF<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4612 : InstRXF<opcode, (outs cls1:$R1),
4625 class TernaryVRIa<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4627 : InstVRIa<opcode, (outs tr1.op:$V1), (ins tr2.op:$V1src, imm:$I2, index:$M3),
4635 class TernaryVRId<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4637 : InstVRId<opcode, (outs tr1.op:$V1),
4646 class TernaryVRIi<string mnemonic, bits<16> opcode, RegisterOperand cls>
4647 : InstVRIi<opcode, (outs VR128:$V1),
4651 class TernaryVRRa<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4653 : InstVRRa<opcode, (outs tr1.op:$V1),
4663 class TernaryVRRaFloatGeneric<string mnemonic, bits<16> opcode>
4664 : InstVRRa<opcode, (outs VR128:$V1),
4668 class TernaryVRRb<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4671 : InstVRRb<opcode, (outs tr1.op:$V1),
4684 multiclass TernaryOptVRRbSPair<string mnemonic, bits<16> opcode,
4689 def "" : TernaryVRRb<mnemonic, opcode, operator, tr1, tr2, type,
4695 def S : TernaryVRRb<mnemonic#"s", opcode, operator_cc, tr1, tr2, type,
4702 multiclass TernaryOptVRRbSPairGeneric<string mnemonic, bits<16> opcode> {
4704 def "" : InstVRRb<opcode, (outs VR128:$V1),
4712 class TernaryVRRc<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4714 : InstVRRc<opcode, (outs tr1.op:$V1),
4724 class TernaryVRRcFloat<string mnemonic, bits<16> opcode,
4727 : InstVRRc<opcode, (outs tr1.op:$V1),
4737 class TernaryVRRcFloatGeneric<string mnemonic, bits<16> opcode>
4738 : InstVRRc<opcode, (outs VR128:$V1),
4743 class TernaryVRRd<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4745 : InstVRRd<opcode, (outs tr1.op:$V1),
4755 class TernaryVRRdGeneric<string mnemonic, bits<16> opcode>
4756 : InstVRRd<opcode, (outs VR128:$V1),
4764 multiclass TernaryExtraVRRd<string mnemonic, bits<16> opcode,
4768 def "" : InstVRRd<opcode, (outs tr1.op:$V1),
4779 multiclass TernaryExtraVRRdGeneric<string mnemonic, bits<16> opcode> {
4781 def "" : InstVRRd<opcode, (outs VR128:$V1),
4790 class TernaryVRRe<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4793 : InstVRRe<opcode, (outs tr1.op:$V1),
4805 class TernaryVRReFloatGeneric<string mnemonic, bits<16> opcode>
4806 : InstVRRe<opcode, (outs VR128:$V1),
4810 class TernaryVRSb<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4812 : InstVRSb<opcode, (outs tr1.op:$V1),
4823 class TernaryVRRi<string mnemonic, bits<16> opcode, RegisterOperand cls>
4824 : InstVRRi<opcode, (outs cls:$R1), (ins VR128:$V2,
4828 class TernaryVRRj<string mnemonic, bits<16> opcode>
4829 : InstVRRj<opcode, (outs VR128:$V1), (ins VR128:$V2,
4833 class TernaryVRSbGeneric<string mnemonic, bits<16> opcode>
4834 : InstVRSb<opcode, (outs VR128:$V1),
4842 class TernaryVRV<string mnemonic, bits<16> opcode, bits<5> bytes,
4844 : InstVRV<opcode, (outs VR128:$V1),
4853 class TernaryVRX<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4855 : InstVRX<opcode, (outs tr1.op:$V1),
4867 class QuaternaryVRId<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4869 : InstVRId<opcode, (outs tr1.op:$V1),
4881 class QuaternaryVRIdGeneric<string mnemonic, bits<16> opcode>
4882 : InstVRId<opcode, (outs VR128:$V1),
4890 class QuaternaryVRIf<string mnemonic, bits<16> opcode>
4891 : InstVRIf<opcode, (outs VR128:$V1),
4896 class QuaternaryVRIg<string mnemonic, bits<16> opcode>
4897 : InstVRIg<opcode, (outs VR128:$V1),
4902 class QuaternaryVRRd<string mnemonic, bits<16> opcode,
4906 : InstVRRd<opcode, (outs tr1.op:$V1),
4917 class QuaternaryVRRdGeneric<string mnemonic, bits<16> opcode>
4918 : InstVRRd<opcode, (outs VR128:$V1),
4925 multiclass QuaternaryOptVRRdSPair<string mnemonic, bits<16> opcode,
4930 def "" : QuaternaryVRRd<mnemonic, opcode, operator,
4937 def S : QuaternaryVRRd<mnemonic#"s", opcode, operator_cc,
4945 multiclass QuaternaryOptVRRdSPairGeneric<string mnemonic, bits<16> opcode> {
4947 def "" : QuaternaryVRRdGeneric<mnemonic, opcode>;
4953 class SideEffectQuaternaryRRFa<string mnemonic, bits<16> opcode,
4956 : InstRRFa<opcode, (outs), (ins cls1:$R1, cls2:$R2, cls3:$R3, imm32zx4:$M4),
4959 multiclass SideEffectQuaternaryRRFaOptOpt<string mnemonic, bits<16> opcode,
4963 def "" : SideEffectQuaternaryRRFa<mnemonic, opcode, cls1, cls2, cls3>;
4964 def Opt : SideEffectTernaryRRFa<mnemonic, opcode, cls1, cls2, cls3>;
4965 def OptOpt : SideEffectBinaryRRFa<mnemonic, opcode, cls1, cls2>;
4968 class SideEffectQuaternaryRRFb<string mnemonic, bits<16> opcode,
4971 : InstRRFb<opcode, (outs), (ins cls1:$R1, cls2:$R2, cls3:$R3, imm32zx4:$M4),
4974 multiclass SideEffectQuaternaryRRFbOpt<string mnemonic, bits<16> opcode,
4978 def "" : SideEffectQuaternaryRRFb<mnemonic, opcode, cls1, cls2, cls3>;
4979 def Opt : SideEffectTernaryRRFb<mnemonic, opcode, cls1, cls2, cls3>;
4982 class SideEffectQuaternarySSe<string mnemonic, bits<8> opcode,
4984 : InstSSe<opcode, (outs),
4989 class LoadAndOpRSY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
4991 : InstRSYa<opcode, (outs cls:$R1), (ins cls:$R3, (mode $B2, $D2):$BD2),
4998 class CmpSwapRRE<string mnemonic, bits<16> opcode,
5000 : InstRRE<opcode, (outs cls1:$R1), (ins cls1:$R1src, cls2:$R2),
5008 class CmpSwapRS<string mnemonic, bits<8> opcode, SDPatternOperator operator,
5010 : InstRSa<opcode, (outs cls:$R1),
5020 class CmpSwapRSY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
5022 : InstRSYa<opcode, (outs cls:$R1),
5042 class RotateSelectRIEf<string mnemonic, bits<16> opcode, RegisterOperand cls1,
5044 : InstRIEf<opcode, (outs cls1:$R1),
5052 class PrefetchRXY<string mnemonic, bits<16> opcode, SDPatternOperator operator>
5053 : InstRXYb<opcode, (outs),
5058 class PrefetchRILPC<string mnemonic, bits<12> opcode,
5060 : InstRILc<opcode, (outs), (ins imm32zx4_timm:$M1, pcrel32:$RI2),
5069 class BranchPreloadSMI<string mnemonic, bits<8> opcode>
5070 : InstSMI<opcode, (outs),
5075 class BranchPreloadMII<string mnemonic, bits<8> opcode>
5076 : InstMII<opcode, (outs),
5462 multiclass BinaryRXYAndPseudo<string mnemonic, bits<16> opcode,
5466 def "" : BinaryRXY<mnemonic, opcode, operator, cls, load, bytes, mode> {
5492 multiclass BinaryRXEAndPseudo<string mnemonic, bits<16> opcode,
5495 def "" : BinaryRXE<mnemonic, opcode, operator, cls, load, bytes> {
5502 multiclass TernaryRXFAndPseudo<string mnemonic, bits<16> opcode,
5506 def "" : TernaryRXF<mnemonic, opcode, operator, cls1, cls2, load, bytes> {
5513 multiclass CondUnaryRSYPairAndMemFold<string mnemonic, bits<16> opcode,
5517 defm "" : CondUnaryRSYPair<mnemonic, opcode, operator, cls, bytes, mode>;
5535 multiclass MemorySS<string mnemonic, bits<8> opcode, SDPatternOperator memop> {
5536 def "" : SideEffectBinarySSa<mnemonic, opcode>;
5550 multiclass CompareMemorySS<string mnemonic, bits<8> opcode,
5552 def "" : SideEffectBinarySSa<mnemonic, opcode>;
5570 multiclass StringRRE<string mnemonic, bits<16> opcode,
5573 def "" : SideEffectBinaryMemMemRRE<mnemonic, opcode, GR64, GR64>;