Lines Matching refs:LowGPR

172   unsigned LowGPR = 0;  in assignCalleeSavedSpillSlots()  local
180 LowGPR = Reg; in assignCalleeSavedSpillSlots()
193 ZFI->setRestoreGPRRegs(LowGPR, HighGPR, StartSPOffset); in assignCalleeSavedSpillSlots()
203 LowGPR = Reg; StartSPOffset = Offset; in assignCalleeSavedSpillSlots()
207 ZFI->setSpillGPRRegs(LowGPR, HighGPR, StartSPOffset); in assignCalleeSavedSpillSlots()
328 if (SpillGPRs.LowGPR) { in spillCalleeSavedRegisters()
329 assert(SpillGPRs.LowGPR != SpillGPRs.HighGPR && in spillCalleeSavedRegisters()
336 addSavedGPR(MBB, MIB, SpillGPRs.LowGPR, false); in spillCalleeSavedRegisters()
400 if (RestoreGPRs.LowGPR) { in restoreCalleeSavedRegisters()
404 assert(RestoreGPRs.LowGPR != RestoreGPRs.HighGPR && in restoreCalleeSavedRegisters()
411 MIB.addReg(RestoreGPRs.LowGPR, RegState::Define); in restoreCalleeSavedRegisters()
421 if (Reg != RestoreGPRs.LowGPR && Reg != RestoreGPRs.HighGPR && in restoreCalleeSavedRegisters()
470 ZFI->getRestoreGPRRegs().LowGPR != SystemZ::R6D) in processFunctionBeforeFrameFinalized()
565 if (ZFI->getSpillGPRRegs().LowGPR) { in emitPrologue()
706 if (ZFI->getRestoreGPRRegs().LowGPR) { in emitEpilogue()
1097 if (SpillGPRs.LowGPR) { in spillCalleeSavedRegisters()
1098 assert(SpillGPRs.LowGPR != SpillGPRs.HighGPR && in spillCalleeSavedRegisters()
1105 addSavedGPR(MBB, MIB, SpillGPRs.LowGPR, false); in spillCalleeSavedRegisters()
1172 if (RestoreGPRs.LowGPR) { in restoreCalleeSavedRegisters()
1174 if (RestoreGPRs.LowGPR == RestoreGPRs.HighGPR) in restoreCalleeSavedRegisters()
1176 BuildMI(MBB, MBBI, DL, TII->get(SystemZ::LG), RestoreGPRs.LowGPR) in restoreCalleeSavedRegisters()
1185 MIB.addReg(RestoreGPRs.LowGPR, RegState::Define); in restoreCalleeSavedRegisters()
1195 if (Reg > RestoreGPRs.LowGPR && Reg < RestoreGPRs.HighGPR) in restoreCalleeSavedRegisters()
1225 if (ZFI->getSpillGPRRegs().LowGPR) { in emitPrologue()
1334 if (ZFI->getRestoreGPRRegs().LowGPR != SPReg) { in emitEpilogue()