Lines Matching refs:addReg

43       .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg()))  in lowerRILow()
47 .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg())) in lowerRILow()
48 .addReg(SystemZMC::getRegAsGR32(MI->getOperand(1).getReg())) in lowerRILow()
57 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg())) in lowerRIHigh()
61 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg())) in lowerRIHigh()
62 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(1).getReg())) in lowerRIHigh()
70 .addReg(MI->getOperand(0).getReg()) in lowerRIEfLow()
71 .addReg(MI->getOperand(1).getReg()) in lowerRIEfLow()
72 .addReg(SystemZMC::getRegAsGR64(MI->getOperand(2).getReg())) in lowerRIEfLow()
123 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg())) in lowerSubvectorLoad()
124 .addReg(MI->getOperand(1).getReg()) in lowerSubvectorLoad()
126 .addReg(MI->getOperand(3).getReg()); in lowerSubvectorLoad()
133 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg())) in lowerSubvectorStore()
134 .addReg(MI->getOperand(1).getReg()) in lowerSubvectorStore()
136 .addReg(MI->getOperand(3).getReg()) in lowerSubvectorStore()
149 .addReg(SystemZMC::GR64Regs[static_cast<unsigned>(CT)])); in emitCallInformation()
205 .addReg(SystemZ::R14D); in emitInstruction()
210 .addReg(SystemZ::R7D) in emitInstruction()
212 .addReg(0); in emitInstruction()
219 .addReg(SystemZ::R14D); in emitInstruction()
226 .addReg(SystemZ::R7D) in emitInstruction()
228 .addReg(0); in emitInstruction()
233 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
234 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
236 .addReg(SystemZ::R14D) in emitInstruction()
242 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
243 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
245 .addReg(SystemZ::R14D) in emitInstruction()
251 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
254 .addReg(SystemZ::R14D) in emitInstruction()
260 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
263 .addReg(SystemZ::R14D) in emitInstruction()
269 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
270 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
272 .addReg(SystemZ::R14D) in emitInstruction()
278 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
279 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
281 .addReg(SystemZ::R14D) in emitInstruction()
287 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
290 .addReg(SystemZ::R14D) in emitInstruction()
296 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
299 .addReg(SystemZ::R14D) in emitInstruction()
306 .addReg(SystemZ::R7D) in emitInstruction()
314 .addReg(SystemZ::R7D) in emitInstruction()
315 .addReg(MI->getOperand(0).getReg())); in emitInstruction()
321 .addReg(SystemZ::R3D) in emitInstruction()
322 .addReg(MI->getOperand(0).getReg())); in emitInstruction()
347 MCInstBuilder(SystemZ::LLILF).addReg(TargetReg).addImm(Disp)); in emitInstruction()
351 MCInstBuilder(SystemZ::ALGFI).addReg(TargetReg).addImm(Disp)); in emitInstruction()
356 .addReg(TargetReg) in emitInstruction()
357 .addReg(ADAReg) in emitInstruction()
359 .addReg(IndexReg)); in emitInstruction()
365 .addReg(SystemZ::R14D) in emitInstruction()
371 .addReg(SystemZ::R14D) in emitInstruction()
372 .addReg(MI->getOperand(0).getReg()); in emitInstruction()
389 .addReg(MI->getOperand(0).getReg()); in emitInstruction()
396 .addReg(MI->getOperand(2).getReg()); in emitInstruction()
401 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
402 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
404 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
410 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
411 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
413 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
419 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
422 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
428 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
431 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
437 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
438 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
440 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
446 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
447 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
449 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
455 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
458 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
464 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
467 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
473 .addReg(SystemZ::R14D) in emitInstruction()
480 .addReg(SystemZ::R14D) in emitInstruction()
487 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
493 .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg())) in emitInstruction()
499 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg())) in emitInstruction()
515 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
516 .addReg(SystemZMC::getRegAsGR64(MI->getOperand(1).getReg())) in emitInstruction()
517 .addReg(SystemZMC::getRegAsGR64(MI->getOperand(2).getReg())); in emitInstruction()
523 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg())) in emitInstruction()
524 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(1).getReg())); in emitInstruction()
565 .addReg(SystemZMC::getRegAsGR64(MI->getOperand(0).getReg())) in emitInstruction()
566 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(1).getReg())) in emitInstruction()
567 .addReg(0).addImm(0); in emitInstruction()
572 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg())) in emitInstruction()
573 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg())) in emitInstruction()
574 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
575 .addReg(0).addImm(0); in emitInstruction()
615 .addImm(14).addReg(SystemZ::R0D); in emitInstruction()
618 .addImm(15).addReg(SystemZ::R0D); in emitInstruction()
673 MCInst ET = MCInstBuilder(TargetInsOpc).addReg(DestReg) in emitInstruction()
674 .addImm(DestDisp).addImm(1).addReg(SrcReg).addImm(SrcDisp); in emitInstruction()
685 MCInstBuilder(SystemZ::EXRL).addReg(LenMinus1Reg).addExpr(Dot)); in emitInstruction()
706 MCInstBuilder(SystemZ::BCRAsm).addImm(0).addReg(SystemZ::R0D), STI); in EmitNop()
711 MCInstBuilder(SystemZ::BCAsm).addImm(0).addReg(0).addImm(0).addReg(0), in EmitNop()
747 MCInstBuilder(SystemZ::BRASL).addReg(SystemZ::R0D).addExpr(Op), in LowerFENTRY_CALL()
811 .addReg(ScratchReg) in LowerPATCHPOINT()
816 .addReg(ScratchReg) in LowerPATCHPOINT()
822 .addReg(SystemZ::R14D) in LowerPATCHPOINT()
823 .addReg(ScratchReg)); in LowerPATCHPOINT()
829 .addReg(SystemZ::R14D) in LowerPATCHPOINT()