999   OutStreamer->AddComment(Twine("Offset ")                                     \  in emitADASection()
1188   OutStreamer->AddComment("PPA1 Flags 1");  in emitPPA1Flags()
1190     OutStreamer->AddComment("  Bit 0: 1 = 64-bit DSA");  in emitPPA1Flags()
1192     OutStreamer->AddComment("  Bit 0: 0 = 32-bit DSA");  in emitPPA1Flags()
1194     OutStreamer->AddComment("  Bit 7: 1 = Vararg function");  in emitPPA1Flags()
1197   OutStreamer->AddComment("PPA1 Flags 2");  in emitPPA1Flags()
1199     OutStreamer->AddComment("  Bit 0: 1 = External procedure");  in emitPPA1Flags()
1201     OutStreamer->AddComment("  Bit 3: 1 = STACKPROTECT is enabled");  in emitPPA1Flags()
1203     OutStreamer->AddComment("  Bit 3: 0 = STACKPROTECT is not enabled");  in emitPPA1Flags()
1206   OutStreamer->AddComment("PPA1 Flags 3");  in emitPPA1Flags()
1208     OutStreamer->AddComment("  Bit 2: 1 = FP Reg Mask is in optional area");  in emitPPA1Flags()
1212   OutStreamer->AddComment("PPA1 Flags 4");  in emitPPA1Flags()
1214     OutStreamer->AddComment("  Bit 2: 1 = Vector Reg Mask is in optional area");  in emitPPA1Flags()
1216     OutStreamer->AddComment("  Bit 3: 1 = C++ EH block");  in emitPPA1Flags()
1219     OutStreamer->AddComment("  Bit 7: 1 = Name Length and Name");  in emitPPA1Flags()
1241   OutStreamer->AddComment("Length of Name");  in emitPPA1Name()
1243   OutStreamer->AddComment("Name of Function");  in emitPPA1Name()
1332   OutStreamer->AddComment("PPA1");  in emitPPA1()
1334   OutStreamer->AddComment("Version");  in emitPPA1()
1336   OutStreamer->AddComment("LE Signature X'CE'");  in emitPPA1()
1338   OutStreamer->AddComment("Saved GPR Mask");  in emitPPA1()
1340   OutStreamer->AddComment("Offset to PPA2");  in emitPPA1()
1352   OutStreamer->AddComment("Length/4 of Parms");  in emitPPA1()
1355   OutStreamer->AddComment("Length of Code");  in emitPPA1()
1360     OutStreamer->AddComment("FPR mask");  in emitPPA1()
1362     OutStreamer->AddComment("AR mask");  in emitPPA1()
1364     OutStreamer->AddComment("FPR Save Area Locator");  in emitPPA1()
1365     OutStreamer->AddComment(Twine("  Bit 0-3: Register R")  in emitPPA1()
1368     OutStreamer->AddComment(Twine("  Bit 4-31: Offset ")  in emitPPA1()
1378     OutStreamer->AddComment("VR mask");  in emitPPA1()
1382     OutStreamer->AddComment("VR Save Area Locator");  in emitPPA1()
1383     OutStreamer->AddComment(Twine("  Bit 0-3: Register R")  in emitPPA1()
1386     OutStreamer->AddComment(Twine("  Bit 4-31: Offset ")  in emitPPA1()
1401     OutStreamer->AddComment("Version");  in emitPPA1()
1403     OutStreamer->AddComment("Flags");  in emitPPA1()
1405     OutStreamer->AddComment("Personality routine");  in emitPPA1()
1408     OutStreamer->AddComment("LSDA location");  in emitPPA1()
1540   OutStreamer->AddComment("A(PPA2-CELQSTRT)");  in emitPPA2()
1579     OutStreamer->AddComment("XPLINK Routine Layout Entry");  in emitFunctionEntryLabel()
1581     OutStreamer->AddComment("Eyecatcher 0x00C300C500C500");  in emitFunctionEntryLabel()
1583     OutStreamer->AddComment("Mark Type C'1'");  in emitFunctionEntryLabel()
1585     OutStreamer->AddComment("Offset to PPA1");  in emitFunctionEntryLabel()
1589       OutStreamer->AddComment("DSA Size 0x" + Twine::utohexstr(DSASize));  in emitFunctionEntryLabel()
1590       OutStreamer->AddComment("Entry Flags");  in emitFunctionEntryLabel()
1592         OutStreamer->AddComment("  Bit 1: 1 = Leaf function");  in emitFunctionEntryLabel()
1594         OutStreamer->AddComment("  Bit 1: 0 = Non-leaf function");  in emitFunctionEntryLabel()
1596         OutStreamer->AddComment("  Bit 2: 1 = Uses alloca");  in emitFunctionEntryLabel()
1598         OutStreamer->AddComment("  Bit 2: 0 = Does not use alloca");  in emitFunctionEntryLabel()