Lines Matching refs:Regs
872 const unsigned *Regs; in parseRegister() local
874 case GR32Reg: Regs = SystemZMC::GR32Regs; break; in parseRegister()
875 case GRH32Reg: Regs = SystemZMC::GRH32Regs; break; in parseRegister()
876 case GR64Reg: Regs = SystemZMC::GR64Regs; break; in parseRegister()
877 case GR128Reg: Regs = SystemZMC::GR128Regs; break; in parseRegister()
878 case FP32Reg: Regs = SystemZMC::FP32Regs; break; in parseRegister()
879 case FP64Reg: Regs = SystemZMC::FP64Regs; break; in parseRegister()
880 case FP128Reg: Regs = SystemZMC::FP128Regs; break; in parseRegister()
881 case VR32Reg: Regs = SystemZMC::VR32Regs; break; in parseRegister()
882 case VR64Reg: Regs = SystemZMC::VR64Regs; break; in parseRegister()
883 case VR128Reg: Regs = SystemZMC::VR128Regs; break; in parseRegister()
884 case AR32Reg: Regs = SystemZMC::AR32Regs; break; in parseRegister()
885 case CR64Reg: Regs = SystemZMC::CR64Regs; break; in parseRegister()
887 if (Regs[Reg.Num] == 0) in parseRegister()
891 SystemZOperand::createReg(Kind, Regs[Reg.Num], Reg.StartLoc, Reg.EndLoc)); in parseRegister()
1113 const unsigned *Regs; in parseAddress() local
1115 case GR32Reg: Regs = SystemZMC::GR32Regs; break; in parseAddress()
1116 case GR64Reg: Regs = SystemZMC::GR64Regs; break; in parseAddress()
1126 Base = Reg1.Num == 0 ? 0 : Regs[Reg1.Num]; in parseAddress()
1140 Index = Reg1.Num == 0 ? 0 : Regs[Reg1.Num]; in parseAddress()
1142 Base = Reg1.Num == 0 ? 0 : Regs[Reg1.Num]; in parseAddress()
1148 Base = Reg2.Num == 0 ? 0 : Regs[Reg2.Num]; in parseAddress()
1156 Base = Reg2.Num == 0 ? 0 : Regs[Reg2.Num]; in parseAddress()
1174 Base = Reg2.Num == 0 ? 0 : Regs[Reg2.Num]; in parseAddress()
1186 Base = Reg2.Num == 0 ? 0 : Regs[Reg2.Num]; in parseAddress()