Lines Matching refs:Op3Val

404 multiclass F3_12<string OpcStr, bits<6> Op3Val, SDNode OpNode,
407   def rr  : F3_1<2, Op3Val,
412   def ri  : F3_2<2, Op3Val,
421 multiclass F3_12np<string OpcStr, bits<6> Op3Val, InstrItinClass itin = IIC_iu_instr> {
422   def rr  : F3_1<2, Op3Val,
426   def ri  : F3_2<2, Op3Val,
433 multiclass Load<string OpcStr, bits<6> Op3Val, SDPatternOperator OpNode,
435   def rr  : F3_1<3, Op3Val,
440   def ri  : F3_2<3, Op3Val,
449 multiclass LoadASI<string OpcStr, bits<6> Op3Val, RegisterClass RC> {
450   def rr  : F3_1_asi<3, Op3Val, (outs RC:$rd), (ins (MEMrr $rs1, $rs2):$addr, ASITag:$asi),
455   def ri  : F3_2<3, Op3Val, (outs RC:$rd), (ins (MEMri $rs1, $simm13):$addr),
461 multiclass LoadA<string OpcStr, bits<6> Op3Val, bits<6> LoadAOp3Val,
464              Load<OpcStr, Op3Val, OpNode, RC, Ty, itin> {
485 multiclass Store<string OpcStr, bits<6> Op3Val, SDPatternOperator OpNode,
487   def rr  : F3_1<3, Op3Val,
492   def ri  : F3_2<3, Op3Val,
501 multiclass StoreASI<string OpcStr, bits<6> Op3Val, RegisterClass RC,
503   def rr : F3_1_asi<3, Op3Val, (outs), (ins (MEMrr $rs1, $rs2):$addr, RC:$rd, ASITag:$asi),
509   def ri : F3_2<3, Op3Val, (outs), (ins (MEMri $rs1, $simm13):$addr, RC:$rd),
515 multiclass StoreA<string OpcStr, bits<6> Op3Val, bits<6> StoreAOp3Val,
517              Store<OpcStr, Op3Val, OpNode, RC, Ty> {