Lines Matching refs:G0
1222 // to construct a MEMrr with fixed G0 registers.
1828 def : Pat<(i32 0), (COPY (i32 G0))>;
1831 (ORri (i32 G0), imm:$val)>;
1847 def : Pat<(SPlo tglobaladdr:$in), (ORri (i32 G0), tglobaladdr:$in)>;
1849 def : Pat<(SPlo tconstpool:$in), (ORri (i32 G0), tconstpool:$in)>;
1853 def : Pat<(SPlo tglobaltlsaddr:$in), (ORri (i32 G0), tglobaltlsaddr:$in)>;
1861 def : Pat<(SPlo tblockaddress:$in), (ORri (i32 G0), tblockaddress:$in)>;
1889 def : Pat<(store (i32 0), ADDRrr:$dst), (STrr ADDRrr:$dst, (i32 G0))>;
1890 def : Pat<(store (i32 0), ADDRri:$dst), (STri ADDRri:$dst, (i32 G0))>;
1925 // The upper part is done with ORrr instead of `COPY G0`
1926 // or a normal register copy, since `COPY G0`s in that place
1931 (ORrr (i32 G0), (i32 G0)), sub_even),