Lines Matching refs:isV9
1765 if (Subtarget->isV9()) { in SparcTargetLowering()
1794 if (!Subtarget->isV9()) { in SparcTargetLowering()
1886 if (Subtarget->isV9() && Subtarget->hasHardQuad()) { in SparcTargetLowering()
1902 if (Subtarget->isV9()) { in SparcTargetLowering()
2623 bool isV9, bool is64Bit) { in LowerBR_CC() argument
2642 if (is64Bit && isV9 && LHS.getValueType() == MVT::i64 && in LowerBR_CC()
2650 if (isV9) in LowerBR_CC()
2660 Opc = isV9 ? SPISD::BPICC : SPISD::BRICC; in LowerBR_CC()
2662 unsigned CmpOpc = isV9 ? SPISD::CMPFCC_V9 : SPISD::CMPFCC; in LowerBR_CC()
2665 Opc = isV9 ? SPISD::BRFCC_V9 : SPISD::BRFCC; in LowerBR_CC()
2674 bool isV9, bool is64Bit) { in LowerSELECT_CC() argument
2700 if (is64Bit && isV9 && LHS.getValueType() == MVT::i64 && in LowerSELECT_CC()
2716 unsigned CmpOpc = isV9 ? SPISD::CMPFCC_V9 : SPISD::CMPFCC; in LowerSELECT_CC()
3065 static SDValue LowerFNEGorFABS(SDValue Op, SelectionDAG &DAG, bool isV9) { in LowerFNEGorFABS() argument
3088 if (isV9) in LowerFNEGorFABS()
3093 if (isV9) in LowerFNEGorFABS()
3239 bool isV9 = Subtarget->isV9(); in LowerOperation() local
3262 return LowerBR_CC(Op, DAG, *this, hasHardQuad, isV9, is64Bit); in LowerOperation()
3264 return LowerSELECT_CC(Op, DAG, *this, hasHardQuad, isV9, is64Bit); in LowerOperation()
3283 case ISD::FNEG: return LowerFNEGorFABS(Op, DAG, isV9); in LowerOperation()
3341 if (Subtarget->isV9()) in EmitInstrWithCustomInserter()
3353 if (Subtarget->isV9()) in EmitInstrWithCustomInserter()