Lines Matching full:mo
68 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
112 const MCOperand &MO = MI.getOperand(SymOpNo);
113 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI);
122 getMachineOpValue(const MCInst &MI, const MCOperand &MO,
125 if (MO.isReg())
126 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg());
128 if (MO.isImm())
129 return MO.getImm();
131 assert(MO.isExpr());
132 const MCExpr *Expr = MO.getExpr();
151 const MCOperand &MO = MI.getOperand(OpNo);
153 if (MO.isImm())
154 return MO.getImm();
156 assert(MO.isExpr() &&
159 const MCExpr *Expr = MO.getExpr();
182 const MCOperand &MO = MI.getOperand(OpNo);
183 const MCExpr *Expr = MO.getExpr();
209 const MCOperand &MO = MI.getOperand(OpNo);
210 if (MO.isReg() || MO.isImm())
211 return getMachineOpValue(MI, MO, Fixups, STI);
213 Fixups.push_back(MCFixup::create(0, MO.getExpr(),
222 const MCOperand &MO = MI.getOperand(OpNo);
223 if (MO.isReg() || MO.isImm())
224 return getMachineOpValue(MI, MO, Fixups, STI);
226 Fixups.push_back(MCFixup::create(0, MO.getExpr(),
235 const MCOperand &MO = MI.getOperand(OpNo);
236 if (MO.isReg() || MO.isImm())
237 return getMachineOpValue(MI, MO, Fixups, STI);
240 MCFixup::create(0, MO.getExpr(), (MCFixupKind)Sparc::fixup_sparc_br16));