Lines Matching refs:SPIRV
60 namespace CL = SPIRV::OpenCLExtInst;
61 namespace GL = SPIRV::GLSLExtInst;
64 std::vector<std::pair<SPIRV::InstructionSet::InstructionSet, uint32_t>>;
298 if (Opcode == SPIRV::ASSIGN_TYPE) { // These pseudos aren't needed any more. in select()
372 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpVectorShuffle)) in spvSelect()
408 return selectUnOp(ResVReg, ResType, I, SPIRV::OpConvertFToS); in spvSelect()
410 return selectUnOp(ResVReg, ResType, I, SPIRV::OpConvertFToU); in spvSelect()
413 return selectIToF(ResVReg, ResType, I, true, SPIRV::OpConvertSToF); in spvSelect()
415 return selectIToF(ResVReg, ResType, I, false, SPIRV::OpConvertUToF); in spvSelect()
418 return selectUnOp(ResVReg, ResType, I, SPIRV::OpBitCount); in spvSelect()
531 return selectUnOp(ResVReg, ResType, I, SPIRV::OpFConvert); in spvSelect()
534 return selectUnOp(ResVReg, ResType, I, SPIRV::OpConvertPtrToU); in spvSelect()
536 return selectUnOp(ResVReg, ResType, I, SPIRV::OpConvertUToPtr); in spvSelect()
552 (*II).getOpcode() == SPIRV::OpVariable) && in spvSelect()
556 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpSpecConstantOp)) in spvSelect()
560 SPIRV::Opcode::InBoundsPtrAccessChain)) in spvSelect()
568 return selectAtomicRMW(ResVReg, ResType, I, SPIRV::OpAtomicOr); in spvSelect()
570 return selectAtomicRMW(ResVReg, ResType, I, SPIRV::OpAtomicIAdd); in spvSelect()
572 return selectAtomicRMW(ResVReg, ResType, I, SPIRV::OpAtomicAnd); in spvSelect()
574 return selectAtomicRMW(ResVReg, ResType, I, SPIRV::OpAtomicSMax); in spvSelect()
576 return selectAtomicRMW(ResVReg, ResType, I, SPIRV::OpAtomicSMin); in spvSelect()
578 return selectAtomicRMW(ResVReg, ResType, I, SPIRV::OpAtomicISub); in spvSelect()
580 return selectAtomicRMW(ResVReg, ResType, I, SPIRV::OpAtomicXor); in spvSelect()
582 return selectAtomicRMW(ResVReg, ResType, I, SPIRV::OpAtomicUMax); in spvSelect()
584 return selectAtomicRMW(ResVReg, ResType, I, SPIRV::OpAtomicUMin); in spvSelect()
586 return selectAtomicRMW(ResVReg, ResType, I, SPIRV::OpAtomicExchange); in spvSelect()
591 return selectAtomicRMW(ResVReg, ResType, I, SPIRV::OpAtomicFAddEXT); in spvSelect()
594 return selectAtomicRMW(ResVReg, ResType, I, SPIRV::OpAtomicFAddEXT, in spvSelect()
595 SPIRV::OpFNegate); in spvSelect()
597 return selectAtomicRMW(ResVReg, ResType, I, SPIRV::OpAtomicFMinEXT); in spvSelect()
599 return selectAtomicRMW(ResVReg, ResType, I, SPIRV::OpAtomicFMaxEXT); in spvSelect()
622 {{SPIRV::InstructionSet::OpenCL_std, CLInst}}); in selectExtInst()
630 ExtInstList ExtInsts = {{SPIRV::InstructionSet::OpenCL_std, CLInst}, in selectExtInst()
631 {SPIRV::InstructionSet::GLSL_std_450, GLInst}}; in selectExtInst()
641 SPIRV::InstructionSet::InstructionSet Set = Ex.first; in selectExtInst()
645 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpExtInst)) in selectExtInst()
689 case SPIRV::OpConvertPtrToU: in selectUnOp()
690 SpecOpcode = static_cast<uint32_t>(SPIRV::Opcode::ConvertPtrToU); in selectUnOp()
692 case SPIRV::OpConvertUToPtr: in selectUnOp()
693 SpecOpcode = static_cast<uint32_t>(SPIRV::Opcode::ConvertUToPtr); in selectUnOp()
698 TII.get(SPIRV::OpSpecConstantOp)) in selectUnOp()
717 return selectUnOp(ResVReg, ResType, I, SPIRV::OpBitcast); in selectBitcast()
720 static SPIRV::Scope::Scope getScope(SyncScope::ID Ord, in getScope()
723 return SPIRV::Scope::Invocation; in getScope()
725 return SPIRV::Scope::Device; in getScope()
727 return SPIRV::Scope::Workgroup; in getScope()
729 return SPIRV::Scope::CrossDevice; in getScope()
731 return SPIRV::Scope::Subgroup; in getScope()
740 return SPIRV::Scope::Device; in getScope()
745 uint32_t SpvMemOp = static_cast<uint32_t>(SPIRV::MemoryOperand::None); in addMemoryOperands()
747 SpvMemOp |= static_cast<uint32_t>(SPIRV::MemoryOperand::Volatile); in addMemoryOperands()
749 SpvMemOp |= static_cast<uint32_t>(SPIRV::MemoryOperand::Nontemporal); in addMemoryOperands()
751 SpvMemOp |= static_cast<uint32_t>(SPIRV::MemoryOperand::Aligned); in addMemoryOperands()
753 if (SpvMemOp != static_cast<uint32_t>(SPIRV::MemoryOperand::None)) { in addMemoryOperands()
755 if (SpvMemOp & static_cast<uint32_t>(SPIRV::MemoryOperand::Aligned)) in addMemoryOperands()
761 uint32_t SpvMemOp = static_cast<uint32_t>(SPIRV::MemoryOperand::None); in addMemoryOperands()
763 SpvMemOp |= static_cast<uint32_t>(SPIRV::MemoryOperand::Volatile); in addMemoryOperands()
765 SpvMemOp |= static_cast<uint32_t>(SPIRV::MemoryOperand::Nontemporal); in addMemoryOperands()
767 if (SpvMemOp != static_cast<uint32_t>(SPIRV::MemoryOperand::None)) in addMemoryOperands()
776 auto MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpLoad)) in selectLoad()
796 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpStore)) in selectStore()
813 if (!STI.canUseExtension(SPIRV::Extension::SPV_INTEL_variable_length_array)) in selectStackSave()
819 return BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpSaveMemoryINTEL)) in selectStackSave()
826 if (!STI.canUseExtension(SPIRV::Extension::SPV_INTEL_variable_length_array)) in selectStackRestore()
834 return BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpRestoreMemoryINTEL)) in selectStackRestore()
851 ArrTy, I, TII, SPIRV::StorageClass::UniformConstant); in selectMemOperation()
863 buildOpDecorate(VarReg, I, TII, SPIRV::Decoration::Constant, {}); in selectMemOperation()
864 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpVariable)) in selectMemOperation()
867 .addImm(SPIRV::StorageClass::UniformConstant) in selectMemOperation()
871 ValTy, I, TII, SPIRV::StorageClass::UniformConstant); in selectMemOperation()
873 selectUnOpWithSrc(SrcReg, SourceTy, I, VarReg, SPIRV::OpBitcast); in selectMemOperation()
875 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpCopyMemorySized)) in selectMemOperation()
911 Register TmpReg = MRI->createVirtualRegister(&SPIRV::IDRegClass); in selectAtomicRMW()
933 if (!DefType || DefType->getOpcode() != SPIRV::OpTypeVector) in selectUnmergeValues()
947 MRI->setRegClass(ResVReg, &SPIRV::IDRegClass); in selectUnmergeValues()
952 BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpCompositeExtract)) in selectUnmergeValues()
970 return BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpMemoryBarrier)) in selectFence()
1008 Register ACmpRes = MRI->createVirtualRegister(&SPIRV::IDRegClass); in selectAtomicCmpXchg()
1011 BuildMI(*I.getParent(), I, DL, TII.get(SPIRV::OpAtomicCompareExchange)) in selectAtomicCmpXchg()
1021 Register CmpSuccReg = MRI->createVirtualRegister(&SPIRV::IDRegClass); in selectAtomicCmpXchg()
1023 Result |= BuildMI(*I.getParent(), I, DL, TII.get(SPIRV::OpIEqual)) in selectAtomicCmpXchg()
1029 Register TmpReg = MRI->createVirtualRegister(&SPIRV::IDRegClass); in selectAtomicCmpXchg()
1030 Result |= BuildMI(*I.getParent(), I, DL, TII.get(SPIRV::OpCompositeInsert)) in selectAtomicCmpXchg()
1037 Result |= BuildMI(*I.getParent(), I, DL, TII.get(SPIRV::OpCompositeInsert)) in selectAtomicCmpXchg()
1047 static bool isGenericCastablePtr(SPIRV::StorageClass::StorageClass SC) { in isGenericCastablePtr()
1049 case SPIRV::StorageClass::Workgroup: in isGenericCastablePtr()
1050 case SPIRV::StorageClass::CrossWorkgroup: in isGenericCastablePtr()
1051 case SPIRV::StorageClass::Function: in isGenericCastablePtr()
1058 static bool isUSMStorageClass(SPIRV::StorageClass::StorageClass SC) { in isUSMStorageClass()
1060 case SPIRV::StorageClass::DeviceOnlyINTEL: in isUSMStorageClass()
1061 case SPIRV::StorageClass::HostOnlyINTEL: in isUSMStorageClass()
1080 (UIs.begin()->getOpcode() == SPIRV::OpConstantComposite || in selectAddrSpaceCast()
1081 UIs.begin()->getOpcode() == SPIRV::OpVariable || in selectAddrSpaceCast()
1087 SPIRV::StorageClass::Generic); in selectAddrSpaceCast()
1089 BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpSpecConstantOp)) in selectAddrSpaceCast()
1092 .addImm(static_cast<uint32_t>(SPIRV::Opcode::PtrCastToGeneric)) in selectAddrSpaceCast()
1099 SPIRV::StorageClass::StorageClass SrcSC = GR.getPointerStorageClass(SrcPtr); in selectAddrSpaceCast()
1100 SPIRV::StorageClass::StorageClass DstSC = GR.getPointerStorageClass(ResVReg); in selectAddrSpaceCast()
1111 if (DstSC == SPIRV::StorageClass::Generic && isGenericCastablePtr(SrcSC)) in selectAddrSpaceCast()
1112 return selectUnOp(ResVReg, ResType, I, SPIRV::OpPtrCastToGeneric); in selectAddrSpaceCast()
1114 if (SrcSC == SPIRV::StorageClass::Generic && isGenericCastablePtr(DstSC)) in selectAddrSpaceCast()
1115 return selectUnOp(ResVReg, ResType, I, SPIRV::OpGenericCastToPtr); in selectAddrSpaceCast()
1118 Register Tmp = MRI->createVirtualRegister(&SPIRV::IDRegClass); in selectAddrSpaceCast()
1120 GR.getPointeeType(SrcPtrTy), I, TII, SPIRV::StorageClass::Generic); in selectAddrSpaceCast()
1123 bool Success = BuildMI(BB, I, DL, TII.get(SPIRV::OpPtrCastToGeneric)) in selectAddrSpaceCast()
1128 return Success && BuildMI(BB, I, DL, TII.get(SPIRV::OpGenericCastToPtr)) in selectAddrSpaceCast()
1137 if (isUSMStorageClass(SrcSC) && DstSC == SPIRV::StorageClass::CrossWorkgroup) in selectAddrSpaceCast()
1139 SPIRV::OpPtrCastToCrossWorkgroupINTEL); in selectAddrSpaceCast()
1140 if (SrcSC == SPIRV::StorageClass::CrossWorkgroup && isUSMStorageClass(DstSC)) in selectAddrSpaceCast()
1142 SPIRV::OpCrossWorkgroupCastToPtrINTEL); in selectAddrSpaceCast()
1143 if (isUSMStorageClass(SrcSC) && DstSC == SPIRV::StorageClass::Generic) in selectAddrSpaceCast()
1144 return selectUnOp(ResVReg, ResType, I, SPIRV::OpPtrCastToGeneric); in selectAddrSpaceCast()
1145 if (SrcSC == SPIRV::StorageClass::Generic && isUSMStorageClass(DstSC)) in selectAddrSpaceCast()
1146 return selectUnOp(ResVReg, ResType, I, SPIRV::OpGenericCastToPtr); in selectAddrSpaceCast()
1156 return SPIRV::OpFOrdEqual; in getFCmpOpcode()
1158 return SPIRV::OpFOrdGreaterThanEqual; in getFCmpOpcode()
1160 return SPIRV::OpFOrdGreaterThan; in getFCmpOpcode()
1162 return SPIRV::OpFOrdLessThanEqual; in getFCmpOpcode()
1164 return SPIRV::OpFOrdLessThan; in getFCmpOpcode()
1166 return SPIRV::OpFOrdNotEqual; in getFCmpOpcode()
1168 return SPIRV::OpOrdered; in getFCmpOpcode()
1170 return SPIRV::OpFUnordEqual; in getFCmpOpcode()
1172 return SPIRV::OpFUnordGreaterThanEqual; in getFCmpOpcode()
1174 return SPIRV::OpFUnordGreaterThan; in getFCmpOpcode()
1176 return SPIRV::OpFUnordLessThanEqual; in getFCmpOpcode()
1178 return SPIRV::OpFUnordLessThan; in getFCmpOpcode()
1180 return SPIRV::OpFUnordNotEqual; in getFCmpOpcode()
1182 return SPIRV::OpUnordered; in getFCmpOpcode()
1192 return SPIRV::OpIEqual; in getICmpOpcode()
1194 return SPIRV::OpINotEqual; in getICmpOpcode()
1196 return SPIRV::OpSGreaterThanEqual; in getICmpOpcode()
1198 return SPIRV::OpSGreaterThan; in getICmpOpcode()
1200 return SPIRV::OpSLessThanEqual; in getICmpOpcode()
1202 return SPIRV::OpSLessThan; in getICmpOpcode()
1204 return SPIRV::OpUGreaterThanEqual; in getICmpOpcode()
1206 return SPIRV::OpUGreaterThan; in getICmpOpcode()
1208 return SPIRV::OpULessThanEqual; in getICmpOpcode()
1210 return SPIRV::OpULessThan; in getICmpOpcode()
1219 return SPIRV::OpPtrEqual; in getPtrCmpOpcode()
1221 return SPIRV::OpPtrNotEqual; in getPtrCmpOpcode()
1232 return SPIRV::OpLogicalEqual; in getBoolCmpOpcode()
1234 return SPIRV::OpLogicalNotEqual; in getBoolCmpOpcode()
1253 bool IsBoolTy = GR.isScalarOrVectorOfType(InputRegister, SPIRV::OpTypeBool); in selectAnyOrAll()
1254 bool IsVectorTy = InputType->getOpcode() == SPIRV::OpTypeVector; in selectAnyOrAll()
1264 bool IsFloatTy = GR.isScalarOrVectorOfType(InputRegister, SPIRV::OpTypeFloat); in selectAnyOrAll()
1266 IsFloatTy ? SPIRV::OpFOrdNotEqual : SPIRV::OpINotEqual; in selectAnyOrAll()
1273 : MRI->createVirtualRegister(&SPIRV::IDRegClass); in selectAnyOrAll()
1303 return selectAnyOrAll(ResVReg, ResType, I, SPIRV::OpAll); in selectAll()
1309 return selectAnyOrAll(ResVReg, ResType, I, SPIRV::OpAny); in selectAny()
1322 return BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpExtInst)) in selectFmix()
1325 .addImm(static_cast<uint32_t>(SPIRV::InstructionSet::GLSL_std_450)) in selectFmix()
1341 return BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpExtInst)) in selectRsqrt()
1344 .addImm(static_cast<uint32_t>(SPIRV::InstructionSet::GLSL_std_450)) in selectRsqrt()
1354 return BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpBitReverse)) in selectBitreverse()
1375 case SPIRV::ASSIGN_TYPE: in selectFreeze()
1382 case SPIRV::OpUndef: in selectFreeze()
1388 DestOpCode = SPIRV::OpConstantNull; in selectFreeze()
1412 assert(ConstTy && ConstTy->getOpcode() == SPIRV::ASSIGN_TYPE && in selectConstVector()
1422 TII.get(SPIRV::OpConstantComposite)) in selectConstVector()
1436 if (OpDef->getOpcode() == SPIRV::ASSIGN_TYPE && in getArrayComponentCount()
1450 if (OpDef->getOpcode() == SPIRV::ASSIGN_TYPE && in isConstReg()
1499 if (ResType->getOpcode() == SPIRV::OpTypeVector) in selectSplatVector()
1501 else if (ResType->getOpcode() == SPIRV::OpTypeArray) in selectSplatVector()
1519 TII.get(IsConst ? SPIRV::OpConstantComposite in selectSplatVector()
1520 : SPIRV::OpCompositeConstruct)) in selectSplatVector()
1552 if (GR.isScalarOfType(CmpOperand, SPIRV::OpTypePointer)) in selectICmp()
1554 else if (GR.isScalarOrVectorOfType(CmpOperand, SPIRV::OpTypeBool)) in selectICmp()
1593 MI = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpConstantNull)) in buildI32Constant()
1597 MI = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpConstantI)) in buildI32Constant()
1618 if (ResType->getOpcode() == SPIRV::OpTypeVector) in buildZerosVal()
1642 if (ResType->getOpcode() == SPIRV::OpTypeVector) in buildZerosValF()
1653 if (ResType->getOpcode() == SPIRV::OpTypeVector) in buildOnesVal()
1666 GR.isScalarOfType(I.getOperand(1).getReg(), SPIRV::OpTypeBool); in selectSelect()
1668 IsScalarBool ? SPIRV::OpSelectSISCond : SPIRV::OpSelectSIVCond; in selectSelect()
1685 if (GR.isScalarOrVectorOfType(I.getOperand(1).getReg(), SPIRV::OpTypeBool)) { in selectIToF()
1688 if (ResType->getOpcode() == SPIRV::OpTypeVector) { in selectIToF()
1692 SrcReg = MRI->createVirtualRegister(&SPIRV::IDRegClass); in selectIToF()
1702 if (GR.isScalarOrVectorOfType(SrcReg, SPIRV::OpTypeBool)) in selectExt()
1713 unsigned Opcode = IsSigned ? SPIRV::OpSConvert : SPIRV::OpUConvert; in selectExt()
1723 Register BitIntReg = MRI->createVirtualRegister(&SPIRV::IDRegClass); in selectIntToBool()
1724 bool IsVectorTy = IntTy->getOpcode() == SPIRV::OpTypeVector; in selectIntToBool()
1725 unsigned Opcode = IsVectorTy ? SPIRV::OpBitwiseAndV : SPIRV::OpBitwiseAndS; in selectIntToBool()
1735 return BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpINotEqual)) in selectIntToBool()
1748 if (GR.isScalarOrVectorOfType(ResVReg, SPIRV::OpTypeBool)) in selectTrunc()
1757 unsigned Opcode = IsSigned ? SPIRV::OpSConvert : SPIRV::OpUConvert; in selectTrunc()
1766 assert(TyOpcode != SPIRV::OpTypePointer || Imm.isZero()); in selectConst()
1768 if ((TyOpcode == SPIRV::OpTypePointer || TyOpcode == SPIRV::OpTypeEvent) && in selectConst()
1770 return BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpConstantNull)) in selectConst()
1774 if (TyOpcode == SPIRV::OpTypeInt) { in selectConst()
1784 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpConstantI)) in selectConst()
1796 return BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpUndef)) in selectOpUndef()
1805 if (TypeInst->getOpcode() == SPIRV::ASSIGN_TYPE) { in isImm()
1810 return TypeInst->getOpcode() == SPIRV::OpConstantI; in isImm()
1815 if (TypeInst->getOpcode() == SPIRV::OpConstantI) in foldImm()
1826 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpCompositeInsert)) in selectInsertVal()
1842 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpCompositeExtract)) in selectExtractVal()
1857 return BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpVectorInsertDynamic)) in selectInsertElt()
1872 return BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpVectorExtractDynamic)) in selectExtractElt()
1889 ? (IsGEPInBounds ? SPIRV::OpInBoundsAccessChain in selectGEP()
1890 : SPIRV::OpAccessChain) in selectGEP()
1891 : (IsGEPInBounds ? SPIRV::OpInBoundsPtrAccessChain in selectGEP()
1892 : SPIRV::OpPtrAccessChain); in selectGEP()
1901 (Opcode == SPIRV::OpAccessChain || Opcode == SPIRV::OpInBoundsAccessChain) in selectGEP()
1934 WrapReg = MRI->createVirtualRegister(&SPIRV::IDRegClass); in wrapIntoSpecConstantOp()
1941 Result = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpSpecConstantOp)) in wrapIntoSpecConstantOp()
1944 .addImm(static_cast<uint32_t>(SPIRV::Opcode::Bitcast)) in wrapIntoSpecConstantOp()
1983 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpUndef)) in selectIntrinsic()
1992 unsigned Opcode = SPIRV::OpConstantNull; in selectIntrinsic()
1995 Opcode = SPIRV::OpConstantComposite; in selectIntrinsic()
2010 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpName)); in selectIntrinsic()
2019 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpSwitch)); in selectIntrinsic()
2035 BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpUnreachable)); in selectIntrinsic()
2042 if (STI.canUseExtension(SPIRV::Extension::SPV_KHR_expect_assume)) in selectIntrinsic()
2043 BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpAssumeTrueKHR)) in selectIntrinsic()
2047 if (STI.canUseExtension(SPIRV::Extension::SPV_KHR_expect_assume)) in selectIntrinsic()
2048 BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpExpectKHR)) in selectIntrinsic()
2066 unsigned Op = IID == Intrinsic::spv_lifetime_start ? SPIRV::OpLifetimeStart in selectIntrinsic()
2067 : SPIRV::OpLifetimeStop; in selectIntrinsic()
2071 bool IsNonvoidPtr = PonteeOpType != 0 && PonteeOpType != SPIRV::OpTypeVoid; in selectIntrinsic()
2094 TII.get(SPIRV::OpVariableLengthArrayINTEL)) in selectAllocaArray()
2113 if (Opcode == SPIRV::OpFunction || Opcode == SPIRV::OpFunctionParameter) { in selectFrameIndex()
2116 !(Opcode == SPIRV::ASSIGN_TYPE || Opcode == SPIRV::OpLabel)) { in selectFrameIndex()
2121 return BuildMI(*MBB, It, It->getDebugLoc(), TII.get(SPIRV::OpVariable)) in selectFrameIndex()
2124 .addImm(static_cast<uint32_t>(SPIRV::StorageClass::Function)) in selectFrameIndex()
2136 return BuildMI(MBB, I, I.getDebugLoc(), TII.get(SPIRV::OpBranchConditional)) in selectBranch()
2142 return BuildMI(MBB, I, I.getDebugLoc(), TII.get(SPIRV::OpBranch)) in selectBranch()
2160 if (NextI != nullptr && NextI->getOpcode() == SPIRV::OpBranchConditional) in selectBranchCond()
2167 return BuildMI(MBB, I, I.getDebugLoc(), TII.get(SPIRV::OpBranchConditional)) in selectBranchCond()
2177 auto MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpPhi)) in selectPhi()
2198 SPIRV::AccessQualifier::ReadWrite, false); in selectGlobalValue()
2203 GVType, MIRBuilder, SPIRV::AccessQualifier::ReadWrite, false); in selectGlobalValue()
2237 STI.canUseExtension(SPIRV::Extension::SPV_INTEL_function_pointers) in selectGlobalValue()
2246 MRI->setRegClass(FuncVReg, &SPIRV::IDRegClass); in selectGlobalValue()
2249 TII.get(SPIRV::OpConstantFunctionPointerINTEL)) in selectGlobalValue()
2257 return BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpConstantNull)) in selectGlobalValue()
2279 SPIRV::StorageClass::StorageClass Storage = in selectGlobalValue()
2282 Storage != SPIRV::StorageClass::Function; in selectGlobalValue()
2283 SPIRV::LinkageType::LinkageType LnkType = in selectGlobalValue()
2285 ? SPIRV::LinkageType::Import in selectGlobalValue()
2287 STI.canUseExtension(SPIRV::Extension::SPV_KHR_linkonce_odr) in selectGlobalValue()
2288 ? SPIRV::LinkageType::LinkOnceODR in selectGlobalValue()
2289 : SPIRV::LinkageType::Export); in selectGlobalValue()
2300 if (STI.canUseExtInstSet(SPIRV::InstructionSet::OpenCL_std)) { in selectLog10()
2313 Register VarReg = MRI->createVirtualRegister(&SPIRV::IDRegClass); in selectLog10()
2315 BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpExtInst)) in selectLog10()
2318 .addImm(static_cast<uint32_t>(SPIRV::InstructionSet::GLSL_std_450)) in selectLog10()
2324 assert(ResType->getOpcode() == SPIRV::OpTypeVector || in selectLog10()
2325 ResType->getOpcode() == SPIRV::OpTypeFloat); in selectLog10()
2328 ResType->getOpcode() == SPIRV::OpTypeVector in selectLog10()
2335 auto Opcode = ResType->getOpcode() == SPIRV::OpTypeVector in selectLog10()
2336 ? SPIRV::OpVectorTimesScalar in selectLog10()
2337 : SPIRV::OpFMulS; in selectLog10()
2360 Vec3Ty, MIRBuilder, SPIRV::StorageClass::Input); in selectSpvThreadId()
2364 MIRBuilder.getMRI()->createVirtualRegister(&SPIRV::IDRegClass); in selectSpvThreadId()
2371 getLinkStringForBuiltIn(SPIRV::BuiltIn::GlobalInvocationId), nullptr, in selectSpvThreadId()
2372 SPIRV::StorageClass::Input, nullptr, true, true, in selectSpvThreadId()
2373 SPIRV::LinkageType::Import, MIRBuilder, false); in selectSpvThreadId()
2377 Register LoadedRegister = MRI->createVirtualRegister(&SPIRV::IDRegClass); in selectSpvThreadId()
2382 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpLoad)) in selectSpvThreadId()
2392 assert(ConstTy && ConstTy->getOpcode() == SPIRV::ASSIGN_TYPE && in selectSpvThreadId()
2402 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpCompositeExtract)) in selectSpvThreadId()